Abstract: Methods and systems directed to a memory-side memory controller for interpreting capabilities and returning datasets to a Central Processing Unit (CPU) are provided. The CPU is configured to translate a first virtual address from a first capability to a first physical address, wherein the first capability is sent by a client application. The CPU is further configured to send the first physical address to the memory-side memory controller through a memory fabric. The memory-side memory controller loads a second capability located in the first physical address from an external memory through the memory fabric, interprets an address encoded within the second capability as a second physical address, and returns a dataset located in the second physical address from the external memory to the CPU through the memory fabric.

Abstract: In one example in accordance with the present disclosure, a system may comprise a memory accessor to access a memory and a pointer loader to load a virtual address (VA) pointer corresponding to a first location in the memory and a physical address (PA) pointer corresponding to the VA pointer. The system may comprise a pointer handler to determine a first physical address in the memory mapped to the first location in the memory and a location matcher to determine whether the second physical address mapped to the PA pointer matches the first physical address. The system may also comprise an exception handler to raise an exception when the second physical address does not match the first physical address.

Abstract: In one example in accordance with the present disclosure, a system may comprise a memory accessor to access a memory and a pointer loader to load a virtual address (VA) pointer corresponding to a first location in the memory and a physical address (PA) pointer corresponding to the VA pointer. The system may comprise a pointer handler to determine a first physical address in the memory mapped to the first location in the memory and a location matcher to determine whether the second physical address mapped to the PA pointer matches the first physical address. The system may also comprise an exception handler to raise an exception when the second physical address does not match the first physical address.

Abstract: Examples disclosed herein relate to a memory controller interpreting capabilities returning datasets. A Central Processing Unit (CPU) is adapted to translate a first virtual address from a first capability to a first physical address, wherein the first capability is sent by a client application. The CPU is further adapted to send the first physical address to a memory controller coupled to a memory fabric. The memory controller loads a second capability located in the first physical address from the memory fabric, interprets an address encoded within the second capability as a second physical address, and returns a dataset located in the second physical address from the memory fabric.