Patents by Inventor Morly Hsieh

Morly Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for performance modeling of integrated circuits
    Patent number: 8365115
    Abstract: A system and method for performance modeling of integrated circuits is provided. A method for performing timing analysis on an integrated circuit is provided, the integrated circuit having a timing path. The method includes computing a number of non-common timing path elements in the timing path, assigning a timing de-rate factor to the timing path based on the number of non-common timing path elements, and computing a timing analysis on the integrated circuit using the assigned timing de-rate factor.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: January 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Louis Chao-Chiuan Liu, Morly Hsieh, Dei-Pei Liu
  • System and Method for Performance Modeling of Integrated Circuits
    Publication number: 20100229137
    Abstract: A system and method for performance modeling of integrated circuits is provided. A method for performing timing analysis on an integrated circuit is provided, the integrated circuit having a timing path. The method includes computing a number of non-common timing path elements in the timing path, assigning a timing de-rate factor to the timing path based on the number of non-common timing path elements, and computing a timing analysis on the integrated circuit using the assigned timing de-rate factor.
    Type: Application
    Filed: December 3, 2009
    Publication date: September 9, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Louis Chao-Chiuan Liu, Morly Hsieh, Dei-Pei Liu