Abstract: A system and method that calculates multiple bytes of data in a single cycle. The invention uses at least two CRC circuits to calculate a CRC value for a string of data. A first CRC circuit is used for calculating multiple bytes at a time. A second CRC circuit is used for calculating a single byte. The first CRC circuit is only used when there are multiple bytes to be processed. If there are other CRC circuits, then data is directed to the appropriate CRC circuit, i.e., the CRC circuit that calculates the appropriate number of bytes, when the number of bytes remaining to be processed is less than the first CRC circuit can process. Otherwise, the data is directed to the second CRC circuit, and must be processed one byte at a time until there is no more data remaining.

Abstract: By testing a received signal for power, frequency content, and stability, one can measurably improve DTMF signal detection and identification performance in voice store and forward systems. The algorithms described here have been found to be especially useful in minimizing talk-off. Further, the approach improves the performance with acoustic-type generators and minimizes transhybrid loss.