Patents by Inventor Morteza Vadipour

Morteza Vadipour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076205
    Abstract: A water desalinization apparatus for efficient water desalinization includes a first removable cover for daytime use and a second removable cover for nighttime use. The first removable cover allows sunlight and infrared rays to pass through the cover to heat saline water held in a fluid basin. The second removable cover is positioned on the fluid basin when the first removable cover is removed from the fluid basin to form the water vapor from the saline water. The second removable cover includes a first plate that acts as a cold body to convert the water vapor to fresh liquid water. A second plate is arranged between a freshwater collection conduit and the fluid basin. The second plate includes nonlinear apertures configured to pass the water vapor from the fluid basin to the first plate. The nonlinear apertures define a shape lacking a direct line of sight through the nonlinear apertures.
    Type: Application
    Filed: August 1, 2023
    Publication date: March 7, 2024
    Inventor: Morteza Vadipour
  • Patent number: 11912178
    Abstract: A system, mechanisms, and components for converting the interior of a vehicle into a sleeping space is disclosed. The vehicle may have front seats with modular back supports that can transform to reduce the seat height so that the back support can recline horizontally backwards and lay flat with the bottom support of the rear seat. The modular back support may have an upper section and a lower section, where the upper section may fold or retract inside the lower section. Additionally, the headrest of the front seat may also retract inside the modular back support to reduce the seat height. The mid-section of the vehicle where the center console and armrest are located may also transform to create a continuous flat surface inside the vehicle.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: February 27, 2024
    Inventor: Morteza Vadipour
  • Publication number: 20230406172
    Abstract: A system, mechanisms, and components for converting the interior of a vehicle into a sleeping space is disclosed. The vehicle may have front seats with modular back supports that can transform to reduce the seat height so that the back support can recline horizontally backwards and lay flat with the bottom support of the rear seat. The modular back support may have an upper section and a lower section, where the upper section may fold or retract inside the lower section. Additionally, the headrest of the front seat may also retract inside the modular back support to reduce the seat height. The mid-section of the vehicle where the center console and armrest are located may also transform to create a continuous flat surface inside the vehicle.
    Type: Application
    Filed: May 4, 2023
    Publication date: December 21, 2023
    Inventor: Morteza Vadipour
  • Patent number: 9614477
    Abstract: The present disclosure is directed to an envelope tracking supply modulator for multiple PAs. The envelope tracking supply modulator is configured to provide, for each of the multiple PAs, a separate supply voltage that is modulated based on the envelope of the respective RF input signal to the PA. Each of the modulated supply voltages is constructed from a DC component and an alternating current (AC) component. The DC component for each modulated supply voltage is generated by a main switching regulator that is shared by the multiple PAs. In one embodiment, the AC component for each modulated supply voltage is generated by an auxiliary switching regulator that is shared by the multiple PAs and a separate linear regulator for each of the multiple PAs. In another embodiment, the AC component for each modulated supply voltage is generated by a separate buffer.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 4, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Dmitriy Rozenblit, Tirdad Sowlati, Ali Afsahi, Debopriyo Chowdhury, Sraavan R. Mundlapudi, Morteza Vadipour
  • Patent number: 8098111
    Abstract: Embodiments of a multi-band voltage controlled oscillator (VCO) are provided herein. The multi-band VCO is configured to adjust a frequency of an output signal based on an input signal. The multi-band VCO includes a tank module, an active module, and a control module. The tank module includes a parallel combination of a capacitor and an inductor. The active module includes a pair of cross-coupled transistors that are configured to provide a negative conductance that cancels out a positive conductance associated with the tank module. To improve the phase noise associated with the multi-band VCO, the control module is configured to adjust the body voltage of the cross-coupled transistors.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: January 17, 2012
    Assignee: Broadcom Corporation
    Inventors: Calvin (Shr-Lung) Chen, Morteza Vadipour, Xinyu Chen
  • Publication number: 20110090017
    Abstract: Embodiments of a multi-band voltage controlled oscillator (VCO) are provided herein. The multi-band VCO is configured to adjust a frequency of an output signal based on an input signal. The multi-band VCO includes a tank module, an active module, and a control module. The tank module includes a parallel combination of a capacitor and an inductor. The active module includes a pair of cross-coupled transistors that are configured to provide a negative conductance that cancels out a positive conductance associated with the tank module. To improve the phase noise associated with the multi-band VCO, the control module is configured to adjust the body voltage of the cross-coupled transistors.
    Type: Application
    Filed: January 26, 2010
    Publication date: April 21, 2011
    Applicant: Broadcom Corporation
    Inventors: Calvin (Shr-Lung) CHEN, Morteza Vadipour, Xinyu Chen
  • Patent number: 7782152
    Abstract: A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 24, 2010
    Assignee: Broadcom Corporation
    Inventors: Hooman Darabi, Yuyu Chang, Zhimin Zhou, Morteza Vadipour
  • Publication number: 20100039194
    Abstract: A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 18, 2010
    Applicant: BROADCOM CORPORATION
    Inventors: Hooman Darabi, Yuyu Chang, Zhimin Zhou, Morteza Vadipour
  • Patent number: 7436336
    Abstract: A sigma delta (??) analog to digital converter (ADC) that compensates for the adverse effects associated with the time delay introduced by delay circuitry of the feedback loop. This ?? ADC includes a first summing stage, first integrator, second summing stage, second integrator, quantizer, and feedback loop. The second integrator has associated with it a feed forward pass operable to reduce negative effects of delay circuitry within the feed back loop. Feedback loop includes delay circuitry and a number of digital to analog converters. The feed forward path that reduces the effects of the delay includes a resistance within the second or additional integrator. This allows the adverse effects of the time delays associated, which may lead to circuit instability or meta-stability, to be reduced or eliminated.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: October 14, 2008
    Assignee: Broadcom Corporation
    Inventor: Morteza Vadipour
  • Publication number: 20080143567
    Abstract: A sigma delta (??) analog to digital converter (ADC) that compensates for the adverse effects associated with the time delay introduced by delay circuitry of the feedback loop. This ?? ADC includes a first summing stage, first integrator, second summing stage, second integrator, quantizer, and feedback loop. The second integrator has associated with it a feed forward pass operable to reduce negative effects of delay circuitry within the feed back loop. Feedback loop includes delay circuitry and a number of digital to analog converters. The feed forward path that reduces the effects of the delay includes a resistance within the second or additional integrator. This allows the adverse effects of the time delays associated, which may lead to circuit instability or meta-stability, to be reduced or eliminated.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Inventor: Morteza Vadipour
  • Patent number: 6392448
    Abstract: A common-mode detection circuit for measuring a common-mode signal between two complementary signals is disclosed. The common-mode detection circuit includes a first signal divider circuit and a linearizer. The signal divider circuit includes a pair of impedances coupled to define a measurement node and respective first and second inputs. The divider further includes a pair of active buffer amplifiers having respective first and seconds outputs for coupling to the signal divider first and second inputs. The linearizer includes respective first and second inputs cross-coupled to the respective second and first buffer amplifier outputs and is operative to maintain both of the buffer amplifiers in a relatively constant operational state.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: May 21, 2002
    Assignee: Teradyne, Inc.
    Inventor: Morteza Vadipour
  • Patent number: 6300804
    Abstract: A differential comparator is disclosed including first and second input amplifier circuits. The input amplifier circuits have respective signal input terminals for receiving respective first and second complementary input signals and respective output terminals. The first and second input amplifier circuits cooperate to produce a difference signal. Reference signal circuitry is coupled to the input amplifier circuits and is operative to produce a predetermined reference signal for comparison to the difference signal. The input amplifier circuits and the reference signal circuitry cooperate to define a single stage.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: October 9, 2001
    Assignee: Teradyne, Inc.
    Inventor: Morteza Vadipour