Abstract: Systems and methods are provided for optimizing the placement of wireless transmitters or other RF components within an environment. A first one of the plurality of RF devices is initially placed at a first initial location within the spatial model, wherein the first initial location is determined with respect to the reference point. The coverage area for the first RF device is determined, and a second one of the plurality of RF devices is initially placed at a second initial location within the spatial model, wherein the second initial location is determined with respect to the coverage area of the first RF device. At least one of the first and second initial locations can be adjusted to improve the combined coverage area of the first and second RF devices.

Abstract: A digitally controlled trim circuit which includes a plurality of resistors connected in series between a circuit node and a reference voltage, a plurality of first solid-state switches (e.g., PMOS transistors) connected in series across respective ones of the resistors, a plurality of multiplexers each having an output coupled to the gate electrode of a respective one of the first switches, a plurality of first control lines coupled to a first input of respective ones of the multiplexers, a plurality of second control lines coupled to a second input of respective ones of the multiplexers, and a plurality of fuses coupled to respective ones of the first control lines. The trim circuit is operable in a trim test mode in response to a first logic level of a select control signal coupled to the select input of each of the multiplexers, and is operable in a fuse-program mode in response to a second logic level of the select control signal.

Abstract: A fail-safe clock generator which has particular utility in implantable cardiac defibrillators includes a crystal oscillator for generating a crystal clock signal, a back-up circuit, and a one-shot generator. The back-up circuit includes a low frequency oscillator for generating a low frequency clock signal having a frequency less than that of the crystal clock signal, and an overspeed/underspeed detector responsive to the low frequency clock signal for detecting the frequency of the crystal clock signal during each period of the low frequency clock signal, and for generating a back-up mode control signal in response to detection of either an overspeed or underspeed failure mode over a plurality of consecutive periods of the low frequency clock signal.