Abstract: The present disclosure provides methods for treating homocystinuria or elevated homocysteine levels in subjects, including methods of improving cognitive function and ameliorating skeletal fragility, and methods of stratifying patient populations to determine disease progression or severity and/or to determine treatment regimens. In some embodiments, the methods of improving cognitive function in a subject having elevated total plasma homocysteine (tHcy) levels further comprise providing a cognitive or behavioral intervention.

Abstract: A variable length decoder (VLD) for decoding MPEG-1 and -2 syntax compliant video bit streams. The VLD includes a micro-sequencer and VLD command decode/execution unit for controlling the MPEG decoding process using a novel instruction set. The instruction set includes a set of commands for decoding the video data and a set of flow control instructions. A rotator/barrel shifter is provided for making a predetermined number of encoded bits from the video bit stream available to the VLD and a variable length table decoder for variable length decoding using the MPEG standard variable length code (VLC) tables. The variable length table decoder shares a prefix pattern matching scheme across all of the VLC tables and organizes the variable length codes into a series of subtables. Each subtable corresponds to one of the unique prefix patterns. Variable length codes are decoded by identifying a leading pattern in the video data bit stream and, in parallel, accessing the subtable corresponding to that leading pattern.

Abstract: A variable length decoder (VLD) for decoding MPEG-1 and -2 syntax compliant video bit streams. The VLD includes a micro-sequencer and VLD command decode/execution unit for controlling the MPEG decoding process using a novel instruction set. The instruction set includes a set of commands for decoding the video data and a set of flow control instructions. A rotator/barrel shifter is provided for making a predetermined number of encoded bits from the video bit stream available to the VLD and a variable length table decoder for variable length decoding using the MPEG standard variable length code (VLC) tables. The variable length table decoder shares a prefix pattern matching scheme across all of the VLC tables and organizes the variable length codes into a series of subtables. Each subtable corresponds to one of the unique prefix patterns. Variable length codes are decoded by identifying a leading pattern in the video data bit stream and, in parallel, accessing the subtable corresponding to that leading pattern.

Abstract: A variable length decoder (VLD) for decoding MPEG-1 and -2 syntax compliant video bit streams. The VLD includes a micro-sequencer and VLD command decode/execution unit for controlling the MPEG decoding process using a novel instruction set. The instruction set includes a set of commands for decoding the video data and a set of flow control instructions. A rotator/barrel shifter is provided for making a predetermined number of encoded bits from the video bit stream available to the VLD and a variable length table decoder for variable length decoding using the MPEG standard variable length code (VLC) tables. The variable length table decoder shares a prefix pattern matching scheme across all of the VLC tables and organizes the variable length codes into a series of subtables. Each subtable corresponds to one of the unique prefix patterns. Variable length codes are decoded by identifying a leading pattern in the video data bit stream and, in parallel, accessing the subtable corresponding to that leading pattern.

Abstract: A special purpose reduced instruction set central processing unit (RISC CPU) for controlling digital audio/video decoding. The instruction set includes flow control instructions which incorporate immediate values, used to jump over a small number of instructions, and other instructions used for larger jumps. Also, instructions obtain data from the video decoder of the ASIC in a streamlined fashion, using video decoder addresses hard-coded into the RISC CPU. Further instructions perform manipulations of individual bits of registers used as state/status flags. The RISC CPU includes watchdog functions for monitoring the delivery of data to the RISC CPU from other functional units or from memory, so that the RISC CPU can execute instructions while delivery of data from memory or other functional units is pending, unless that data is necessary for program execution, in which case, program execution stalls until the data arrives.

Abstract: A CPU interface having an 8-bit mode in which the interface is capable of interfacing with a host CPU having 8-bit data bus, and a 16-bit mode in which the interface is capable of interfacing with a host CPU having a 16-bit data bus. The host CPU interface is further capable of switching between its 8-bit and 16-bit modes in real time in response to a 16-bit host CPU entering sections of 8-bit or 16-bit software. The interface also has "direct" and "indirect" addressing modes, so that the interface can send or receive time-multiplexed data, and receive address information on a single bus ("indirect" mode) or send or receive data, and receive address information in parallel on separate buses ("direct" mode).

Abstract: A decoding circuit for decoding (or decompressing) compressed video data includes an RL circuit, such as MPEG encoded video data. The RL circuit includes a buffer memory for storing run-level pairs during the decoding process. Because the buffer memory in the RL circuit can store ran-level pairs, Huffman-decoding and header decoding, performed by a variable length decoding (VLD) circuit, is decoupled from inverse discrete transform decoding, performed by an IDCT circuit. This decoupling speeds up the decoding pipeline by allowing more continuous operation by both the VLD and IDCT circuits.

Abstract: A dynamic random access memory (DRAM) for use in MPEG decoding includes d devices each having r rows and c columns with b bits per cell and p samples, where b*d is divisible by 8 and r*c is larger than a sum of upstream buffers in bytes and either 2 or 3 times 1.5*1*p divided by (b*d/8). First and second reference picture components are organized first along a depth axis (d) and then along rows (r) with complete lines of a component occupying the same row with the memory region occupied by each component being rectangular and third reference signal components are organized first along a depth axis and then along rows and occupying a largest possible part of each row in multiples of 8*(8/(b*d)).

Abstract: Data transfer and timing in an external DRAM memory of an MPEG decoder utilizes a repetitive pattern for synchronous writing and reading of data and data refresh including a sequence header at the beginning of a picture, a macroblock header for each of the macroblocks of a picture, and a plurality of repetitions of block decoding after each macroblock header decode.

Abstract: An MPEG decoder which distributes the processing load to a plurality of processors and units including an external memory and a bus interface unit, a de-multiplexing data processor, an image data processor, an inverse transform and reconstruction processor, and a prediction calculation unit. A video post-processing unit generates video data, and a serial port unit provides an output for audio data.

Abstract: The structure of conformational, discontinuous binding surfaces that associate with a binding molecule, preferably the epitopes of monoclonal antibodies (mAbs) may be discovered. The binding molecule is used to select specific peptides from a peptide library that, in turn, are used as a binding surface (epitope) defining database that is applied via a novel computer algorithm to analyze the crystalline-structure of the original binding surface (antigen). An antigenic epitope-mimetic that is recognized by its original mAb may be reconstituted based on the segments of the epitope identified in the prediction. The basic elements of the binding domain on gp120 that is recognized by broadly neutralizing antibody b12 are disclosed, as in their use in making vaccines for preventing or treating HIV.