Patents by Inventor Moshe LAZER
Moshe LAZER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12210539Abstract: A method for selecting items one by one from a set of items elected from a large dataset of items includes determining whether or not a density of the set is sparse. If the density is sparse, the method includes repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set. If the density is not sparse, the method includes performing a next index select (NIS) method to create a linked list of the elected items and to repeatedly select a next elected item from the set.Type: GrantFiled: December 17, 2023Date of Patent: January 28, 2025Assignee: GSI Technology Inc.Inventors: Moshe Lazer, Eli Ehrman
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Patent number: 12106071Abstract: A method for calculating a square root B having N bits of a number X having 2N bits includes iterating on bits bi of square root B starting from the most significant bit until the least significant bit of square root B. For each iteration, the method includes locating a 1 at the squared location of bit bi in a CHECK variable, determining the value of bit bi from the result of a comparison of number X with a function of all previously found bits and a previous comparison outcome, shifting all previously found bits right 1 location in a CHECK variable, and adding the determined value of bit bi into its squared location in the CHECK variable.Type: GrantFiled: January 5, 2023Date of Patent: October 1, 2024Assignee: GSI Technology Inc.Inventors: Eyal Amiel, Moshe Lazer, Samuel Lifsches
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Publication number: 20240119061Abstract: A method for selecting items one by one from a set of items elected from a large dataset of items includes determining whether or not a density of the set is sparse. If the density is sparse, the method includes repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set. If the density is not sparse, the method includes performing a next index select (NIS) method to create a linked list of the elected items and to repeatedly select a next elected item from the set.Type: ApplicationFiled: December 17, 2023Publication date: April 11, 2024Inventors: Moshe LAZER, Eli EHRMAN
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Patent number: 11860885Abstract: An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.Type: GrantFiled: March 2, 2021Date of Patent: January 2, 2024Assignee: GSI Technology Inc.Inventors: Moshe Lazer, Eli Ehrman
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Publication number: 20230333815Abstract: A method for an associative memory device includes performing in parallel multi-bit operations of P pairs of multi-bit operands stored in columns of a memory array, each pair is stored in a different column, each bit i of each multi-bit operands of each pair is stored in a row of a section i in the column and each operation occurs in its associated column. A system includes a non-destructive associative memory array with multiple sections, each section j includes cells arranged in rows and columns, to store a bit j from a first multi-bit number in a first row and a bit j from a second multi-bit number in a second row of a same column, and a concurrent adder to, in parallel, perform per-section operations in each section, that includes one or more Boolean operations between a plurality of bits stored in rows of the section.Type: ApplicationFiled: June 19, 2023Publication date: October 19, 2023Inventor: Moshe LAZER
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Patent number: 11755240Abstract: A method for an associative memory device includes storing a plurality of pairs of multi-bit operands X and Y in rows of a memory array of the associative memory device, each pair in a different column of the memory array. Cells in a column are connected by a first bit-line providing a value of activated cells and a second bit-line providing an inverse value of the activated cells. The bits of X are stored in first rows and the bits of Y are stored in second rows. The method includes reading an inverse value of a bit stored in each of the second rows using the second bit-line, writing it to third rows and concurrently, on all columns, performing multi-bit add operations between a value of X, an inverse value of Y and a carry-in bit initiated to 1, providing the difference between X and Y in each of the columns.Type: GrantFiled: February 23, 2022Date of Patent: September 12, 2023Assignee: GSI Technology Inc.Inventors: Moshe Lazer, Eyal Amiel
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Publication number: 20230266911Abstract: A method for an associative memory device includes storing a plurality of pairs of multi-bit operands X and Y in rows of a memory array of the associative memory device, each pair in a different column of the memory array. Cells in a column are connected by a first bit-line providing a value of activated cells and a second bit-line providing an inverse value of the activated cells. The bits of X are stored in first rows and the bits of Y are stored in second rows. The method includes reading an inverse value of a bit stored in each of the second rows using the second bit-line, writing it to third rows and concurrently, on all columns, performing multi-bit add operations between a value of X, an inverse value of Y and a carry-in bit initiated to 1, providing the difference between X and Y in each of the columns.Type: ApplicationFiled: February 23, 2022Publication date: August 24, 2023Inventors: Moshe LAZER, Eyal AMIEL
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Publication number: 20230221925Abstract: A method for calculating a square root B having N bits of a number X having 2N bits includes iterating on bits bi of square root B starting from the most significant bit until the least significant bit of square root B. For each iteration, the method includes locating a 1 at the squared location of bit bi in a CHECK variable, determining the value of bit bi from the result of a comparison of number X with a function of all previously found bits and a previous comparison outcome, shifting all previously found bits right 1 location in a CHECK variable, and adding the determined value of bit bi into its squared location in the CHECK variable.Type: ApplicationFiled: January 5, 2023Publication date: July 13, 2023Inventors: Eyal AMIEL, Moshe LAZER, Samuel LIFSCHES
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Patent number: 11681497Abstract: A method for an associative memory device includes storing a plurality of pairs of N-bit numbers A and B to be added together in columns of a memory array of the associative memory device, each pair in a column, each bit in a row of the column, and dividing each N-bit number A and B into groups containing M bits each, having group carry-out predictions for every group except a first group, the group carry-out predictions calculated for any possible group carry-in value, and, once the carry-out value for a first group is calculated, selecting the next group carry out value from the group carry-out predictions. The method also includes repeating the ripple selecting group carry-out values, until all group carry out values have been selected.Type: GrantFiled: November 2, 2020Date of Patent: June 20, 2023Assignee: GSI Technology Inc.Inventor: Moshe Lazer
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Publication number: 20220413799Abstract: A method for an associative memory device includes the steps of providing a look up table (LUT) with all possible solutions for N first iterations of a CORDIC algorithm, receiving a plurality of input angles, concurrently computing a location index for each angle of the plurality of angles and concurrently storing each index in a column of the associative memory device, copying a solution from the LUT in the location index to a plurality of columns associated with the index and concurrently performing M additional iterations of the CORDIC algorithm on the columns to compute a value of a trigonometric function for each angle.Type: ApplicationFiled: May 11, 2022Publication date: December 29, 2022Inventors: Moshe LAZER, Samuel LIFSCHES, Almog LEVY
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Publication number: 20210182289Abstract: An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.Type: ApplicationFiled: March 2, 2021Publication date: June 17, 2021Inventors: Moshe LAZER, Eli EHRMAN
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Publication number: 20210158164Abstract: A method includes determining a set of k extreme values of a dataset of elements in a constant time irrespective of the size of the dataset. The determining includes reviewing the values bit-by-bit, starting from the most significant bit, where bit n from each element of the dataset is reviewed at the same time.Type: ApplicationFiled: February 2, 2021Publication date: May 27, 2021Inventors: Eli EHRMAN, Avidan AKERIB, Moshe LAZER
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Patent number: 10956432Abstract: A method and a system for selecting items one by one from a set of items in an associative memory array includes determining a density of the set, if the density is sparse, repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set, and if the density is not sparse, performing a next index select (NIS) method to create a linked list of the elected items and to repeatedly select a next elected item from the set. An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.Type: GrantFiled: August 30, 2017Date of Patent: March 23, 2021Assignee: GSI Technology Inc.Inventors: Moshe Lazer, Eli Ehrman
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Publication number: 20210081173Abstract: A method for an associative memory device includes storing a plurality of pairs of N-bit numbers A and B to be added together in columns of a memory array of the associative memory device, each pair in a column, each bit in a row of the column, and dividing each N-bit number A and B into groups containing M bits each, having group carry-out predictions for every group except a first group, the group carry-out predictions calculated for any possible group carry-in value, and, once the carry-out value for a first group is calculated, selecting the next group carry out value from the group carry-out predictions. The method also includes repeating the ripple selecting group carry-out values, until all group carry out values have been selected.Type: ApplicationFiled: November 2, 2020Publication date: March 18, 2021Inventor: Moshe LAZER
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Patent number: 10942736Abstract: A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.Type: GrantFiled: December 16, 2019Date of Patent: March 9, 2021Assignee: GSI Technology Inc.Inventor: Moshe Lazer
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Patent number: 10929751Abstract: A method includes determining a set of k extreme values of a dataset of elements in a constant time irrespective of the size of the dataset. A method creates a set of k indicators, each indicator associated with one multi-bit binary number in a large dataset of multi-bit binary numbers. The method includes arranging the multi-bit binary numbers such that each bit n of each said multi-bit binary number is located in a different row n of an associative memory array, starting from a row storing a most significant bit (MSB), adding an indicator to the set for each multi-bit binary number having a bit with an extreme value in the row and continuing the adding until said set contains k indicators.Type: GrantFiled: July 13, 2017Date of Patent: February 23, 2021Assignee: GSI Technology Inc.Inventors: Eli Ehrman, Avidan Akerib, Moshe Lazer
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Patent number: 10824394Abstract: A system includes an associative memory array and a concurrent adder. The memory array includes a plurality of sections, where each section includes cells arranged in rows and columns. The memory array stores bit j from a first multi-bit number and bit j from a second multi-bit number in a same column in section j. The concurrent adder performs, in parallel, multi-bit add operations of P pairs of multi-bit operands stored in columns of a memory array. Each pair of the P pairs is stored in a different column of the array and each add operation occurs in its associated different column.Type: GrantFiled: August 29, 2019Date of Patent: November 3, 2020Assignee: GSI Technology Inc.Inventor: Moshe Lazer
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Patent number: 10635397Abstract: A method for an associative memory device includes replacing a set of three multi-bit binary numbers P, Q and R, stored in the associative memory device, with two multi-bit binary numbers X and Y, also stored in the associative memory device, wherein a sum of the binary numbers P, Q and R is equal to a sum of the binary numbers X and Y. A system includes an associative memory array having rows and columns and a multi-bit multiplier. Each column of the array stores two multi-bit binary numbers to be multiplied. The multi-bit multiplier multiplies, in parallel, the two multi-bit binary numbers per column by concurrently processing all bits of partial products generated by the multiplier. The multiplier performs the processing without any carry propagation delay when adding all but the last two partial products.Type: GrantFiled: March 8, 2018Date of Patent: April 28, 2020Assignee: GSI Technology Inc.Inventor: Moshe Lazer
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Publication number: 20200117452Abstract: A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventor: Moshe Lazer
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Patent number: 10514914Abstract: A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.Type: GrantFiled: August 29, 2017Date of Patent: December 24, 2019Assignee: GSI Technology Inc.Inventor: Moshe Lazer