Abstract: Coherent reconstruction of dual polarized data and pilot signals without local oscillator or laser.

Abstract: An orthogonal frequency division multiplexing (OFDM) transmitter that includes an encoder, an interleaver, a symbol processor; and a transmission module; wherein the encoder is configured to encode a superframe to provide an encoded superframe; wherein the encoded superframe comprises a sequence of encoded frames; wherein the interleaver is configured to allocate multiple frequency sub-bands to each encoded frame of the encoded superframe by assigning adjacent frequency sub-bands to successive symbols of each encoded frame; wherein the symbol processor is configured to generate, for each encoded frame and according to the assignment of the multiple frequency sub-bands, an intermediate set of symbols; and wherein the transmission module is configured to transmit simultaneously, for each encoded frame, OFDM symbols that represents the intermediate set of symbols.

Abstract: A receiver that may include a receiver front end, a polyphase de-multiplexor having multiple outputs; a polyphase multiplexor having multiple inputs; and a plurality of multi-symbol-differential-detection modules coupled between the multiple outputs of the polyphase de-multiplexor and the multiple inputs of the polyphase multiplexor.

Abstract: A method for exchanging information with an Optical Network Unit (ONU), the method comprising: receiving, by the ONU, downstream signals that comprise a pilot signal and downstream information signals; wherein the downstream information signals embed first polarization modulated information and second polarization modulated information; wherein the pilot signal is received at a pilot frequency slot and the downstream information signals are received at a downstream information frequency slot that differs from the pilot frequency slot; splitting the downstream signals to first, second, third and fourth sets of signals; wherein the splitting comprises performing a polarization based splitting to provide first and second intermediate sets of signals; wherein the first and second sets of signals originate from the first intermediate set of signals and the third and fourth sets of signals originate from the second intermediate set of signals; generating a fifth set of signals by providing the second and fourth set

Abstract: A receiver and a multi-symbol-differential-detection (MSDD) module, the MSDD may include an input node for receiving an input signal having a noisy phase; a summation and rotation unit; and an output unit; wherein the output unit is arranged to output an output signal and a normalized output signal; wherein the output signal represents the input signal but has a reconstructed phase; wherein the summation and rotation unit is arranged to receive the input signal and the output signal and to provide a reference signal that reflects a weighted sum of phase rotated and delayed previously received input signals; wherein the output unit comprises a phase difference calculator, a slicer, a delay unit and a normalizer; wherein the phase difference calculator is arranged to generate a difference signal indicative of a phase difference between the reference signal and the input signal; wherein the slicer and the delay unit are arranged to generate the output signal by slicing the difference signal to provide a sliced s

Abstract: A method for calculating a reconstructed phase that includes: Calculating a current phase signal and current amplitude signal that represent a phase and amplitude of a current input symbol, respectively. Generating, in response to the current phase signal and an estimate of a phase of a last input symbol that preceded the current input symbol, multiple partial references, some of which are responsive to (i) phase signals representative of phases of a plurality of input symbols that preceded the current input symbol, and (ii) estimates of the phase of the plurality of input symbols. Calculating unwrapped partial references. Estimating a constant carrier frequency offset (CFO) phase rotation in response to the unwrapped partial references. Calculating a reconstructed phase of the current input symbol in response to, at least, the estimate of the constant CFO phase rotation and to the unwrapped partial references.

Abstract: An Optical Access Network, a Optical Network Unit (ONU) and various methods for exchanging information are provided.

Abstract: A receiver that includes a carrier recovery module that includes a reference signal generator that is arranged to generate a reference signal that estimates a carrier signal; a decision module that is arranged to demodulate a receiver input signal by the reference signal to provide a demodulated signal and to evaluate the demodulated signal to provide an decision module output signal that estimates the carrier signal; the reference signal generator includes a delay and rotation module that is arranged to delay receiver input signals to provide delayed receiver input signals and to align the delayed receiver input signals by a rotation that is responsive to the decision module output signal thereby providing aligned signals; and a multiplication and summation module that is arranged to generate the reference signal by calculating a weighted sum of the aligned signals.

Abstract: A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.

Abstract: A method for exchanging information with an Optical Network Unit (ONU), the method comprising: receiving, by the ONU, downstream signals that comprise a pilot signal and downstream information signals; wherein the downstream information signals embed first polarization modulated information and second polarization modulated information; wherein the pilot signal is received at a pilot frequency slot and the downstream information signals are received at a downstream information frequency slot that differs from the pilot frequency slot; splitting the downstream signals to first, second, third and fourth sets of signals; wherein the splitting comprises performing a polarization based splitting to provide first and second intermediate sets of signals; wherein the first and second sets of signals originate from the first intermediate set of signals and the third and fourth sets of signals originate from the second intermediate set of signals; generating a fifth set of signals by providing the second and fourth set

Abstract: A method for calculating a reconstructed phase that includes: Calculating a current phase signal and current amplitude signal that represent a phase and amplitude of a current input symbol, respectively. Generating, in response to the current phase signal and an estimate of a phase of a last input symbol that preceded the current input symbol, multiple partial references, some of which are responsive to (i) phase signals representative of phases of a plurality of input symbols that preceded the current input symbol, and (ii) estimates of the phase of the plurality of input symbols. Calculating unwrapped partial references. Estimating a constant carrier frequency offset (CFO) phase rotation in response to the unwrapped partial references. Calculating a reconstructed phase of the current input symbol in response to, at least, the estimate of the constant CFO phase rotation and to the unwrapped partial references.

Abstract: A receiver and a multi-symbol-differential-detection (MSDD) module, the MSDD may include an input node for receiving an input signal having a noisy phase; a summation and rotation unit; and an output unit; wherein the output unit is arranged to output an output signal and a normalized output signal; wherein the output signal represents the input signal but has a reconstructed phase; wherein the summation and rotation unit is arranged to receive the input signal and the output signal and to provide a reference signal that reflects a weighted sum of phase rotated and delayed previously received input signals; wherein the output unit comprises a phase difference calculator, a slicer, a delay unit and a normalizer; wherein the phase difference calculator is arranged to generate a difference signal indicative of a phase difference between the reference signal and the input signal; wherein the slicer and the delay unit are arranged to generate the output signal by slicing the difference signal to provide a sliced s

Abstract: Highly efficient digital domain sub-band based receivers and transmitters.

Abstract: A receiver that includes a carrier recovery module that includes a reference signal generator that is arranged to generate a reference signal that estimates a carrier signal; a decision module that is arranged to demodulate a receiver input signal by the reference signal to provide a demodulated signal and to evaluate the demodulated signal to provide an decision module output signal that estimates the carrier signal; the reference signal generator includes a delay and rotation module that is arranged to delay receiver input signals to provide delayed receiver input signals and to align the delayed receiver input signals by a rotation that is responsive to the decision module output signal thereby providing aligned signals; and a multiplication and summation module that is arranged to generate the reference signal by calculating a weighted sum of the aligned signals.

Abstract: An Optical Access Network, a Optical Network Unit (ONU) and various methods for exchanging information are provided.

Abstract: The new invention relates to a novel high-performance Passive Optical Network (PON) upgrade architecture, based on adapting Multiple Input, Multiple Output (MIMO) beamforming techniques to polarization multiplexing.

Abstract: There is provided a new architecture for all-optical logic architecture. In this architecture the gate is partitioned into a linear front-end followed by a nonlinear back-end. The logic calculation is practically performed within the linear stage, easing the requirements placed on the non-linear part and thus reducing the gate complexity. The new structures provide flexibility and improved performance for the all-optical logic. The proposed scheme may be integrated optics/electronics. An important additional attribute of our all-optical logic family is reconfigurability, i.e. the ability of the hardware architecture or devices to rapidly alter the functionalities of its components and the interconnection between them as needed.

Abstract: A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.

Abstract: The new invention relates to a novel high-performance Passive Optical Network (PON) upgrade architecture, based on adapting Multiple Input, Multiple Output (MIMO) beamforming techniques to polarization multiplexing.

Abstract: The present invention introduces a new architecture for all-optical logic architecture. In this architecture the gate is partitioned into a linear front-end followed by a nonlinear back-end. The logic calculation is practically performed within the linear stage, easing the requirements placed on the non-linear part and thus reducing the gate complexity. The new structures provide flexibility and improved performance for the all-optical logic. The proposed scheme may be integrated optics/electronics. An important additional attribute of our all-optical logic family is reconfigurability, i.e. the ability of the hardware architecture or devices to rapidly alter the functionalities of its components and the interconnection between them as needed.