Patents by Inventor Mostafa ABARZADEH

Mostafa ABARZADEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250007441
    Abstract: As more power electronics apparatuses use fast switches, such as silicon carbide (SiC) or gallium nitride (GaN) switches. to improve the efficiency and reduce switching losses. significantly higher electromagnetic interferences (EMI) are generated as a result. While techniques of random pulse-width modulation (PWM) have been developed to reduce this increased EMI, the use of such techniques leads to an unbalance of the stored electric energy of the energy storing components used to balance the energy across some of the switches of these apparatuses. This issue can be solved with a novel pulse width modulation method for generating the switching signals with variable frequencies for a converter's high-frequency switches that better balance its energy balancing components. This novel method can utilize comparing a reference signal to a carrier signal that can be generated with various switching frequencies that are phase-shifted from the following set of switching frequency, by (2N?1)? radians.
    Type: Application
    Filed: November 23, 2022
    Publication date: January 2, 2025
    Inventors: Mostafa ABARZADEH, Simon CARON
  • Patent number: 12119771
    Abstract: The present disclosure provides a method and apparatus using a novel PWM switching technique that requires only one PWM carrier signal and benefits from two logic functions to provide switching signals and provides the flying capacitor (FC) voltage as well as dc-link capacitors voltages regulated to their desired values without external control. It may also, eliminate the odd multiples of the switching harmonic clusters from the output voltage is possible; double the frequency of first switching harmonic; reduce filtering efforts may be required since the values of the output LC filter inductor and capacitor can be very much reduced. Furthermore, notable reduction in control complexity is possible using the novel PWM method.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: October 15, 2024
    Inventors: Mostafa Abarzadeh, Kamal Al-Haddad
  • Patent number: 12074536
    Abstract: A three-level flying capacitor multi-level (3L-FCM) power converter is controlled by a switching signal generator having a reference signal for generating switching signals for driving a first pair S1, S1? and a second pair S2, S2? of switches. Circuitry generates, from the reference signal, a first modified reference signal defined as half of the sum of 1 and the reference signal. From the first modified reference signal a second modified reference signal is generated having a half-period phase shift from the first modified reference signal. A carrier signal having a constant frequency is generated and a first comparator and a second comparator compare the first and the second modified reference signals to the carrier signal to generate frequency signals for driving the first pair of switches S1, S1?, and the second pair of switches S2, S2?, respectively.
    Type: Grant
    Filed: February 12, 2024
    Date of Patent: August 27, 2024
    Inventors: Mostafa Abarzadeh, Simon Caron
  • Publication number: 20240186915
    Abstract: A three-level flying capacitor multi-level (3L-FCM) power converter is controlled by a switching signal generator having a reference signal for generating switching signals for driving a first pair S1, S1? and a second pair S2, S2? of switches. Circuitry generates, from the reference signal, a first modified reference signal defined as half of the sum of 1 and the reference signal. From the first modified reference signal a second modified reference signal is generated having a half-period phase shift from the first modified reference signal. A carrier signal having a constant frequency is generated and a first comparator and a second comparator compare the first and the second modified reference signals to the carrier signal to generate frequency signals for driving the first pair of switches S1, S1?, and the second pair of switches S2, S2?, respectively.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Inventors: Mostafa ABARZADEH, Simon CARON
  • Publication number: 20230369964
    Abstract: A converter with lower passive filter size and increased flying capacitor charging speed during the converter start-up uses a combination of a multi-level power converter circuit having a flying capacitor in which the first switching harmonic cluster is at twice the switching frequency and an integrated double-stage filter designed to allow the flying capacitor to be efficiently balanced and to allow noise from the harmonic clusters and from switches in the power converter circuit to be suppressed. This provides for a compact power conversion apparatus.
    Type: Application
    Filed: October 5, 2021
    Publication date: November 16, 2023
    Inventors: Mostafa ABARZADEH, Simon CARON, Fadia SEBAALY
  • Publication number: 20230223886
    Abstract: The present disclosure provides a method and apparatus using a novel PWM switching technique that requires only one PWM carrier signal and benefits from two logic functions to provide switching signals and provides the flying capacitor (FC) voltage as well as dc-link capacitors voltages regulated to their desired values without external control. It may also, eliminate the odd multiples of the switching harmonic clusters from the output voltage is possible; double the frequency of first switching harmonic; reduce filtering efforts may be required since the values of the output LC filter inductor and capacitor can be very much reduced. Furthermore, notable reduction in control complexity is possible using the novel PWM method.
    Type: Application
    Filed: June 12, 2020
    Publication date: July 13, 2023
    Inventors: Mostafa ABARZADEH, Kamal AL-HADDAD
  • Patent number: 11456679
    Abstract: Generalized circuit topology of voltage level multiplier modules (VLMMs) for use with multilevel inverters (MLIs) and power converter circuits comprising at least one VLMM and a MLI are described herein. The VLMM is configured to receive a first output voltage from the MLI having a first number of voltage levels and to generate a second output voltage having a second number of voltage levels. If the first number of voltage levels is M, and the VLMM is N-fold voltage level multiplier, then second number of voltage levels is M×N+1. Switching pattern generators for use with the VLMM and modulation methods for controlling switching elements of the VLMM are also described herein.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: September 27, 2022
    Assignee: SOCOVAR S.E.C.
    Inventors: Mostafa Abarzadeh, Kamal Al-Haddad
  • Publication number: 20210067057
    Abstract: Generalized circuit topology of voltage level multiplier modules (VLMMs) for use with multilevel inverters (MLIs) and power converter circuits comprising at least one VLMM and a MLI are described herein. The VLMM is configured to receive a first output voltage from the MLI having a first number of voltage levels and to generate a second output voltage having a second number of voltage levels. If the first number of voltage levels is M, and the VLMM is N-fold voltage level multiplier, then second number of voltage levels is M×N+1. Switching pattern generators for use with the VLMM and modulation methods for controlling switching elements of the VLMM are also described herein.
    Type: Application
    Filed: October 26, 2020
    Publication date: March 4, 2021
    Inventors: Mostafa ABARZADEH, Kamal AL-HADDAD