Patents by Inventor Motohide KAI
Motohide KAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190027619Abstract: A solar cell includes an n-type crystalline silicon wafer, a first silicon nitride layer formed over a light receiving surface of the wafer, an n-type amorphous silicon layer formed over a first region of a back surface, a second silicon nitride layer formed over a part of the n-type amorphous silicon layer, and a p-type amorphous silicon layer formed over a second region of the back surface of the n-type crystalline silicon wafer and over the second silicon nitride layer. The second silicon nitride layer has a higher index of refraction than the first silicon nitride layer.Type: ApplicationFiled: September 20, 2018Publication date: January 24, 2019Applicant: Panasonic Intellectual Property Management Co., Ltd.Inventor: Motohide Kai
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Patent number: 10026853Abstract: A semiconductor substrate of any one of a first conductivity type and a second conductivity type includes a first main surface and a second main surface. A first semiconductor layer of the first conductivity type is provided on the first main surface. A second semiconductor layer of the second conductivity type is provided on the first main surface. A first electrode is electrically connected to the first semiconductor layer. A second electrode is electrically connected to the second semiconductor layer. An insulating layer comprises silicon nitride and is arranged between the first semiconductor layer and the second semiconductor layer in an overlap region where the second semiconductor layer is provided above the first semiconductor layer. An anti-diffusion film is arranged between the insulating layer and the first semiconductor layer and is configured to prevent nitrogen from diffusing from the insulating layer into the first semiconductor layer.Type: GrantFiled: May 29, 2015Date of Patent: July 17, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yoshinari Ichihashi, Motohide Kai
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Patent number: 10014432Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).Type: GrantFiled: February 25, 2016Date of Patent: July 3, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomonori Ueyama, Motohide Kai, Masaki Shima
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Publication number: 20180013021Abstract: A solar cell includes: a semiconductor substrate formed of n-type crystalline silicon; a first stack formed of amorphous silicon in a first region on a first principle surface of the semiconductor substrate; a second stack formed of amorphous silicon in a second region different from the first region on the first principle surface; and a third stack formed of amorphous silicon on a second principle surface of the semiconductor substrate opposite from the first principle surface. The second stack has an oxygen concentration that is higher than that of the first stack.Type: ApplicationFiled: September 15, 2017Publication date: January 11, 2018Inventor: Motohide KAI
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Publication number: 20160181461Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).Type: ApplicationFiled: February 25, 2016Publication date: June 23, 2016Applicant: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomonori UEYAMA, Motohide KAI, Masaki SHIMA
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Publication number: 20150349146Abstract: A semiconductor substrate of any one of a first conductivity type and a second conductivity type includes a first main surface and a second main surface. A first semiconductor layer of the first conductivity type is provided on the first main surface. A second semiconductor layer of the second conductivity type is provided on the first main surface. A first electrode is electrically connected to the first semiconductor layer. A second electrode is electrically connected to the second semiconductor layer. An insulating layer comprises silicon nitride and is arranged between the first semiconductor layer and the second semiconductor layer in an overlap region where the second semiconductor layer is provided above the first semiconductor layer. An anti-diffusion film is arranged between the insulating layer and the first semiconductor layer and is configured to prevent nitrogen from diffusing from the insulating layer into the first semiconductor layer.Type: ApplicationFiled: May 29, 2015Publication date: December 3, 2015Inventors: Yoshinari ICHIHASHI, Motohide KAI
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Publication number: 20140162394Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).Type: ApplicationFiled: November 26, 2013Publication date: June 12, 2014Applicant: SANYO ELECTRIC CO., LTD.Inventors: Motohide Kai, Tomonori Ueyama, Masaki Shima
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Publication number: 20130344247Abstract: A configuration is provided for a deposition device using the catalytic CVD method which reduces problems associated with extension of the catalyst and is superior in terms of running costs and productivity. The configuration provides a chamber 1 able to maintain reduced interior pressure; a source gas introducing route 32, 33a for introducing source gas into the chamber; a catalyst 4 of tantalum wire having a boride layer on the surface and provided inside the chamber 1 so as to allow the source gas introduced via the source gas introducing route to come into contact with the surface of the catalyst; a gas introducing route 36, 33b for introducing boron-containing gas to the chamber 1 for the reformation of the boride layer on the surface of the catalyst 4; and a power supply unit 5 for applying energy to the catalyst 4 to maintain the catalyst at a predetermined temperature.Type: ApplicationFiled: August 28, 2013Publication date: December 26, 2013Applicant: Sanyo Electric Co., Ltd.Inventors: Tomonori Ueyama, Motohide Kai
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Publication number: 20130230651Abstract: A film formation apparatus includes a processing chamber configured to keep an inside thereof in a decompressed state, a gas introduction path configured to introduce a predetermined source gas into the processing chamber, a catalyst provided inside the processing chamber in such a way that the source gas introduced through the gas introduction path comes into contact with a surface of the catalyst or passes near the surface thereof, a power supply unit configured to apply energy to the catalyst to heat the catalyst, a detector provided below the catalyst, and a controller configured to detect an electric current flowing through the detector or a voltage from the detector and to judge a contact state between the catalyst and the detector.Type: ApplicationFiled: April 22, 2013Publication date: September 5, 2013Applicant: Sanyo Electric Co., Ltd.Inventor: Motohide Kai
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Publication number: 20120190176Abstract: In a catalytic CVD equipment, the control unit controls a temperature of the catalytic wires to a standby temperature at predetermined time intervals before and after the film is formed. The standby time is a predetermined temperature which is lower than the temperature of the catalytic wires when the film is formed, and is higher than room temperature.Type: ApplicationFiled: March 30, 2012Publication date: July 26, 2012Applicants: ULVAC, INC., SANYO ELECTRIC CO., LTD.Inventors: Motohide KAI, Shuji OSONO, Satohiro OKAYAMA, Hideyuki OGATA