Patents by Inventor Motohiko Yoshida
Motohiko Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190018267Abstract: A display device includes: a first display panel that includes an electrochromic element and is in a color state to perform color display and a transmissive state; a second display panel that includes a polymer dispersed liquid crystal element, is stacked on the first display panel, and is in a scatter state to scatter a light and a transmissive state; and a light source unit between the first display panel and the second display panel and on one side portion of the second display panel, the light source unit emitting light to the second display panel.Type: ApplicationFiled: September 18, 2018Publication date: January 17, 2019Applicant: Ortus Technology Co. Ltd.Inventor: Motohiko Yoshida
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Patent number: 8427737Abstract: An electrophoretic display device includes: a first substrate and a second substrate which are arranged opposite to each other at a predetermined interval; a plurality of pixel electrodes which are aligned on the first substrate; a wiring which is arranged between adjacent pixel electrodes among the pixel electrodes; an opposite electrode which is provided on the second substrate; a partition wall which is provided above the wiring of the first substrate to stand toward the second substrate so as to surround the pixel electrodes; and a solvent which fills up a space surrounded by the partition wall and in which a plurality of particles are dispersed. The partition wall has a rectangular shape including four sides, at least one of which partially has an expanded-width portion wider than other portion of the at least one of the four sides.Type: GrantFiled: July 20, 2011Date of Patent: April 23, 2013Assignee: Casio Computer Co., Ltd.Inventors: Motohiko Yoshida, Makoto Sasaki
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Publication number: 20120019896Abstract: An electrophoretic display device includes: a first substrate and a second substrate which are arranged opposite to each other at a predetermined interval; a plurality of pixel electrodes which are aligned on the first substrate; a wiring which is arranged between adjacent pixel electrodes among the pixel electrodes; an opposite electrode which is provided on the second substrate; a partition wall which is provided above the wiring of the first substrate to stand toward the second substrate so as to surround the pixel electrodes; and a solvent which fills up a space surrounded by the partition wall and in which a plurality of particles are dispersed. The partition wall has a rectangular shape including four sides, at least one of which partially has an expanded-width portion wider than other portion of the at least one of the four sides.Type: ApplicationFiled: July 20, 2011Publication date: January 26, 2012Applicant: CASIO COMPUTER CO., LTD.Inventors: Motohiko YOSHIDA, Makoto SASAKI
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Patent number: 7981734Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.Type: GrantFiled: July 8, 2009Date of Patent: July 19, 2011Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
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Patent number: 7795621Abstract: A thin film transistor panel including: a transparent substrate; scanning lines made of a light blocking electroconductive material to be formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines and made of a light blocking electroconductive material; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data lines, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover at least a part of the gate electrode of each of the thin film transistors.Type: GrantFiled: February 16, 2006Date of Patent: September 14, 2010Assignee: Casio Computer Co., Ltd.Inventors: Ikuhiro Yamaguchi, Manabu Takei, Motohiko Yoshida
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Publication number: 20090269881Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.Type: ApplicationFiled: July 8, 2009Publication date: October 29, 2009Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.Inventors: Mamoru FURUTA, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
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Publication number: 20090242887Abstract: A display substrate is disclosed comprising: a supporting substrate; an organic resin layer formed on the supporting substrate; and a transparent electrode formed on the organic resin layer, wherein the transparent electrode includes: a first layer containing a zinc oxide and formed in close contact with the organic resin layer; and a second layer containing a zinc oxide and which has a thickness thicker than a thickness of the first layer and is formed on the first layer, wherein the first layer is deposited by either one of a DC sputtering and a DC magnetron sputtering, and the second layer is deposited by any one of a radio frequency sputtering, a radio frequency magnetron sputtering, a radio frequency superimposing a DC sputtering, and a radio frequency superimposing a DC magnetron sputtering, and the display substrate is available, for example, as the substrate having a transparent electrode for counter electrode of liquid crystal display device.Type: ApplicationFiled: March 27, 2009Publication date: October 1, 2009Applicants: CASIO COMPUTER CO., LTD., Kochi University of TechnologyInventors: Tetsuya YAMAMOTO, Naoki YAMAMOTO, Hisao MAKINO, Akira UJIHARA, Yoshinori HIRASHIMA, Hiroaki IWAOKA, Hisashi AOKI, Hitoshi HOKARI, Motohiko YOSHIDA
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Thin film transistor including low resistance conductive thin films and manufacturing method thereof
Patent number: 7576394Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.Type: GrantFiled: February 1, 2007Date of Patent: August 18, 2009Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida -
Patent number: 7385224Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).Type: GrantFiled: September 1, 2005Date of Patent: June 10, 2008Assignee: Casio Computer Co., Ltd.Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
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Thin film transistor including low resistance conductive thin films and manufacturing method thereof
Publication number: 20070187760Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.Type: ApplicationFiled: February 1, 2007Publication date: August 16, 2007Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida -
Publication number: 20060192204Abstract: A thin film transistor panel including: a transparent substrate; scanning lines made of a light blocking electroconductive material to be formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines and made of a light blocking electroconductive material; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data lines, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover at least a part of the gate electrode of each of the thin film transistors.Type: ApplicationFiled: February 16, 2006Publication date: August 31, 2006Applicant: Casio Computer Co., Ltd.Inventors: Ikuhiro Yamaguchi, Manabu Takei, Motohiko Yoshida
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Publication number: 20060043447Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).Type: ApplicationFiled: September 1, 2005Publication date: March 2, 2006Applicant: CASIO COMPUTER CO., LTD.Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
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Patent number: 4677600Abstract: A keyboard apparatus has a plurality of elastically deformable elastic members disposed on a board in a predetermined positional relationship, a plurality of push members each disposed above each of said plurality of elastic members and adapted to push said elastic member to cause the same to elastically deform and produce an acoustic signal. At least three pickups are disposed on the board at different positions for sensing arrival of the acoustic signal. A detecting circuit determines for detecting the keyed position in response to the output from each of the pickups based upon the differences between arrival times of the acoustic signal at these pickups.Type: GrantFiled: December 11, 1985Date of Patent: June 30, 1987Assignee: Alps Electric Co., Ltd.Inventor: Motohiko Yoshida
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Patent number: 4240194Abstract: An automatic tooling machine includes a spindle carrier having a spindle for supporting a machining tool. The spindle carrier includes a tool drum mounting device for rotatably supporting a tool drum having plural machining tools thereon. A device is provided for transferring a selected machining tool between the tool drum supported on the tool drum mounting device and the spindle. A drum storage rack is fixedly positioned separate from the spindle carrier and extends in a longitudinal direction. The rack includes a plurality of drum support members for storing a plurality of tool drums. A carriage track is integral with the spindle carrier. A device is provided for selectively moving the spindle carrier to a position such that the carriage track is positioned adjacent and aligned with a selected of the drum support members. A carriage is provided for moving the tool drum of the selected drum support member along the carriage track between the tool drum mounting device and the selected drum support member.Type: GrantFiled: March 15, 1979Date of Patent: December 23, 1980Inventors: Sumiaki Inami, Haruhiko Koike, Motohiko Yoshida
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Patent number: 4124327Abstract: The present invention relates to an improvement in a mechanism wherein a flywheel which is idly mounted on a spindle of a machining center is easily and speedily connected with or detached from the spindle by a clutch which is fitted on the spindle adjacent to the flywheel for promoting the cutting efficiency by providing spindle inertia of two kinds; one kind for heavy cutting and another for light cutting respectively.Type: GrantFiled: March 30, 1977Date of Patent: November 7, 1978Assignee: Kabushiki Kaisha Yamazaki TekkoshoInventors: Motohiko Yoshida, Nobuyuki Katagiri