Patents by Inventor Motohiko Yoshigai

Motohiko Yoshigai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030230551
    Abstract: An etching system for subjecting a single film to be etched to etching comprised of a plurality of etching steps applying respective different recipes. The etching system comprises a recipe generating means which fixes the recipe to be applied to the final etching step affecting an underlying film making contact with the film to be etched, of the etching steps, to a preset recipe and which generates a recipe to be applied to the residual etching step on the basis of the results of processing, and etching processing is conducted according to the recipes generated by the recipe generating means.
    Type: Application
    Filed: August 21, 2002
    Publication date: December 18, 2003
    Inventors: Akira Kagoshima, Motohiko Yoshigai, Hideyuki Yamamoto, Daisuke Shiraishi, Junichi Tanaka, Kenji Tamaki, Natsuyo Morioka
  • Patent number: 6664738
    Abstract: There is provided a plasmar processing apparatus capable of positively controlling the temperature distribution of a semiconductor wafer during etching processing in a clear state, wherein an electrode block is provided with independent slits as coolant flow paths on the inner and outer peripheries and, at the same time, between these slits is formed a slit for suppressing heat transfer between the inner and outer peripheries, and owing to this slit for suppressing heat transfer, a uniform temperature in the electrode block is suppressed and thus it is possible to obtain an arbitrary independent temperature in the plane of the electrode block and positive and clear control of temperature distribution patterns can be performed.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: December 16, 2003
    Assignees: Hitachi, Ltd., Hitachi High-Technologies
    Inventors: Masatsugu Arai, Ryujiro Udo, Naoyuki Tamura, Masanori Kadotani, Motohiko Yoshigai
  • Patent number: 6660647
    Abstract: A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: December 9, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Takafumi Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
  • Publication number: 20030201256
    Abstract: Plasma is generated in a vacuum processing apparatus and a high-frequency voltage is applied to a lower electrode on which a wafer is placed. The high-frequency voltage applied to the lower electrode is subjected to periodical on-off modulation, the on-off duty ratio of which is determined for each wafer or each plurality of wafers, to carry out plasma processing on the wafer. As a result, in the plasma processing carried out on the wafer, the wafer is fabricated with a high degree of reproducibility by suppressing variations in fabricated-line dimension from wafer to wafer without decreasing the throughput.
    Type: Application
    Filed: August 28, 2002
    Publication date: October 30, 2003
    Inventors: Susumu Tauchi, Masanori Kadotani, Muneo Furuse, Motohiko Yoshigai
  • Patent number: 6620737
    Abstract: The temperature of the specimen holder 6 in the vacuum container 1 is lowered with the thermal control unit 11 to adjust the temperature of the specimen 7 composed of a silicon substrate to a low temperature of 0° C. or lower. Then, trenches are formed in the specimen 7 by plasma etching using an etching gas comprising SF6 as the main constituent and optionally O2 as an additive. Thus, the etching rate and the yield can be increased in the trench formation in the silicon semiconductor substrate.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: September 16, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Go Saito, Masamichi Sakaguchi, Hitoshi Kobayashi, Motohiko Yoshigai, Satoshi Tani
  • Patent number: 6617255
    Abstract: A plasma processing method is provided of processing a sample having a silicon nitride layer with high accuracy of size in anisotropy and excellent selectivity to a silicon oxide layer as underlayer. A mixed atmosphere of chlorine gas containing no fluorine with aluminum is converted into plasma in a plasma etching processing chamber and the sample having the silicon nitride layer is etched by using the plasma.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: September 9, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takao Arase, Motohiko Yoshigai, Go Saito, Masamichi Sakaguchi, Hiroaki Ishimura, Takahiro Shimomura
  • Publication number: 20030160568
    Abstract: There is provided a plasmar processing apparatus capable of positively controlling the temperature distribution of a semiconductor wafer during etching processing in a clear state, wherein an electrode block is provided with independent slits as coolant flow paths on the inner and outer peripheries and, at the same time, between these slits is formed a slit for suppressing heat transfer between the inner and outer peripheries, and owing to this slit for suppressing heat transfer, a uniform temperature in the electrode block is suppressed and thus it is possible to obtain an arbitrary independent temperature in the plane of the electrode block and positive and clear control of temperature distribution patterns can be performed.
    Type: Application
    Filed: February 27, 2002
    Publication date: August 28, 2003
    Inventors: Masatsugu Arai, Ryujiro Udo, Naoyuki Tamura, Masanori Kadotani, Motohiko Yoshigai
  • Publication number: 20030043383
    Abstract: Standard patterns of differential values of interference light that correspond to a predetermined step height of the first material being processed and standard patterns of differential values of interference light that correspond to a predetermined remaining mask layer thickness of the material are set. These standard patterns use wavelengths as parameters. Then, the intensities of interference light of multiple wavelengths are measured for a second material that has the same structure as the first material. Actual patterns with wavelength as parameter are determined from differential values of the measured interference light intensities. Based on the standard patterns and the actual patterns of the differential values, the step height and the remaining mask layer thickness of the second material are determined.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 6, 2003
    Inventors: Tatehito Usui, Takashi Fujii, Motohiko Yoshigai, Tetsunori Kaji, Hideyuki Yamamoto
  • Publication number: 20030040191
    Abstract: By conducting etching treatment using at least two steps with different compositions of gases for each step, and at least one step comprising using a gas capable of decomposing and vaporizing etching products in an etching apparatus continuously, semicondictor devices can be produced with high productivity, low contaminant and good reproducibility of treatment state.
    Type: Application
    Filed: September 6, 2001
    Publication date: February 27, 2003
    Inventors: Hiroyuki Kitsunai, Junichi Tanaka, Takashi Fujii, Motohiko Yoshigai
  • Publication number: 20030022512
    Abstract: The temperature of the specimen holder 6 in the vacuum container 1 is lowered with the thermal control unit 11 to adjust the temperature of the specimen 7 composed of a silicon substrate to a low temperature of 0° C. or lower. Then, trenches are formed in the specimen 7 by plasma etching using an etching gas comprising SF6 as the main constituent and optionally O2 as an additive. Thus, the etching rate and the yield can be increased in the trench formation in the silicon semiconductor substrate.
    Type: Application
    Filed: September 6, 2001
    Publication date: January 30, 2003
    Inventors: Go Saito, Masamichi Sakaguchi, Hitoshi Kobayashi, Motohiko Yoshigai, Satoshi Tani
  • Patent number: 6492277
    Abstract: Electrical damage to semiconductor elements in the plasma etching thereof is suppressed. In processing of a fine pattern by plasma etching, the high frequency power supply to be applied to the specimen is turned off before the charge potential at a portion of the pattern reaches the breakdown voltage of the gate oxide film which is interconnected to said fine pattern, and then the high frequency power supply is turned on when the charge potential at the portion of the pattern drops substantially. This on and off control is effected in a repetitive mode of operation.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: December 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
  • Publication number: 20020123229
    Abstract: A plasma processing method for etching a sample having a gate oxide film includes generating a plasma in a vacuum chamber using electromagnetic waves, applying an rf bias power to the sample, turning off the rf bias power before a charged voltage of the sample reaches a breakdown voltage, turning on the rf bias power after the charged voltage of the sample has substantially dropped, and repeating the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time.
    Type: Application
    Filed: May 1, 2002
    Publication date: September 5, 2002
    Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
  • Publication number: 20020009814
    Abstract: A standard pattern of a differential value of an interference light is set with respect to a predetermined film thickness of a first member to be processed. The standard pattern uses a wavelength as a parameter. Then, an intensity of an interference light of a second member to be processed, composed just like the first member, is measured with respect to each of a plurality of wavelengths so as to obtain a real pattern of an differential value of the measured interference light intensity. The real pattern also uses a wavelength as a parameter. Then, the film thickness of the second member is obtained according to the standard pattern and the real pattern of the differential value.
    Type: Application
    Filed: March 5, 2001
    Publication date: January 24, 2002
    Inventors: Tatehito Usui, Takashi Fujii, Motohiko Yoshigai, Tetsunori Kaji
  • Publication number: 20010055885
    Abstract: A plasma processing method is provided of processing a sample having a silicon nitride layer with high accuracy of size in anisotropy and excellent selectivity to a silicon oxide layer as underlayer. A mixed atmosphere of chlorine gas containing no fluorine with aluminum is converted into plasma in a plasma etching processing chamber and the sample having the silicon nitride layer is etched by using the plasma.
    Type: Application
    Filed: March 7, 2001
    Publication date: December 27, 2001
    Inventors: Takao Arase, Motohiko Yoshigai, Go Saito, Masamichi Sakaguchi, Hiroaki Ishimura, Takahiro Shimomura
  • Patent number: 6235146
    Abstract: A stage with an electrostatic attracting means is adapted for use in a wafer treatment at a high temperature in a vacuum treatment system. In a vacuum treatment system having a stage provided in a treatment chamber, which electrostatically attracts an object to the stage in a low pressure atmosphere, and treats the object at high temperature by heating the stage, an electrode member of the stage is made of titanium or a titanium alloy and a dielectric film for electrostatic attraction is formed on the electrode member. In order to bond firmly titanium and alumina ceramics, it is desirable to sandwich a nickel alloy (Ni—Al) between the materials.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: May 22, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Kadotani, Saburo Kanai, Youichi Itou, Takashi Fujii, Hironobu Kawahara, Ryouji Hamasaki, Kazue Takahashi, Motohiko Yoshigai
  • Patent number: 6191045
    Abstract: In order to provide a method of treating a multilayer including metal and polysilicon for use in a conductor or a gate electrode of a semiconductor device with high accuracy at a high selectivity, the temperature of a sample is maintained at 100° C. or higher at the time of etching a metal film to increase the etch rate of the metal film. In order to suppress the etch rate of a polysilicon film and prevent side etching, an oxygen gas is added to a gas containing a halogen element. In order to suppress the etch rate of a silicon oxide film at the time of etching the polysilicon film, the etching is performed with etch parameters which are divided into those for the metal film and those for the polysilicon film. In the etching performed to the multilayer containing metal and polysilicon, by etching the metal film at a high temperature of 100° C. or higher, the etch rate of the metal film becomes high. Consequently, there is no partial etch residue of the metal film and a barrier film.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: February 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Motohiko Yoshigai, Hiroshi Hasegawa, Hiroshi Akiyama, Takafumi Tokunaga, Tadashi Umezawa, Masayuki Kojima, Kazuo Nojiri, Hiroshi Kawakami, Kunihiko Katou
  • Patent number: 6046425
    Abstract: A plasma processing apparatus includes a plasma processing chamber defining a plasma region. The plasma processing chamber has an inner metallic portion defining at least a portion of the plasma region. The plasma processing apparatus also includes a sample table disposed in the plasma region for holding a sample to be subjected to plasma processing, elements for applying an AC voltage to the sample table, elements for generating a plasma, including a region of intense plasma, in the plasma region independently of the AC voltage applied to the sample table such that the AC voltage applied to the sample table has no effect on the generation of the plasma, and an insulator having a thickness of several tens to several hundreds of micrometers (.mu.m) disposed on the inner metallic portion of the plasma processing chamber in a neighborhood of the region of intense plasma.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 4, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Tetsunori Kaji, Takashi Fujii, Motohiko Yoshigai, Yoshinao Kawasaki, Masaharu Nishiumi
  • Patent number: 5681424
    Abstract: A method of cleaning an etching chamber, with a high throughput, of a plasma processing apparatus for etching by use of hydrogen bromide (HBr) as an etching gas while holding a wafer on an electrode by electrostatic chuck. When the static charge on the wafer electrostatically chucked on the electrode is eliminated after the completion of the etching, O.sub.2 gas is introduced into the etching chamber from a gas flow-rate controller. A plasma of O.sub.2 gas is generated to cause the electric charge on the wafer to flow to the earth through the plasma, and at the same time, the interior of the etching chamber is cleaned.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: October 28, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Go Saito, Motohiko Yoshigai, Kenji Fujimoto
  • Patent number: 5432315
    Abstract: A microwave plasma processing apparatus includes a vacuum chamber which is evacuated to a predetermined pressure and into which processing gas is introduced, a sample table, disposed in the vacuum chamber, to which an AC voltage is applied, a microwave generating device for generating microwaves and introducing the microwaves towards a surface to be processed of a sample located on the sample table, a magnetic field generating device for generating a magnetic field in the vacuum chamber, an insulator disposed on a part of the vacuum chamber exposed to a plasma produced in the vacuum chamber by interaction of the processing gas, the microwaves, and the magnetic field, and a ground electrode disposed in the vacuum chamber at a place which is on a microwave introduction side of the vacuum chamber with respect to the surface of the sample table on which the sample is placed, a surface of the ground electrode being covered by a semiconducting thin film.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: July 11, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Tetsunori Kaji, Takashi Fujii, Motohiko Yoshigai, Yoshinao Kawasaki, Masaharu Nishiumi
  • Patent number: 5290993
    Abstract: A microwave plasma processing device is composed of a vacuum chamber which is evacuated to a predetermined pressure and into which processing gas is introduced; a sample table disposed in the vacuum chamber to which an AC voltage is applied; a microwave generating apparatus which generates microwaves and introduces the microwaves towards a surface to be processed of a sample located on the sample table; a magnetic field generating apparatus for generating a magnetic field in the vacuum chamber; an insulator disposed on a part exposed to plasma produced in the vacuum chamber; and a ground electrode disposed at a place which is on a microwave introduction side with respect to the surface of the sample table on which the sample is placed. The ground electrode arranged in an insulator exposed to the plasma is protected by covering the surface of the ground electrode by an insulating film which is so thin that application of an AC voltage is not prevented.
    Type: Grant
    Filed: May 29, 1992
    Date of Patent: March 1, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Tetsunori Kaji, Takashi Fujii, Motohiko Yoshigai, Yoshinao Kawasaki, Masaharu Nishiumi