Patents by Inventor Motohisa Ikeda
Motohisa Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9244247Abstract: An auto-focus device includes: a light projection lens unit that projects light emitted from a light source unit, on a projection target surface; a light receiving unit that receives a diffusely-reflected light from the projection target surface; a light receiving lens unit that guides the diffusely-reflected light to the light receiving unit; a calculating unit that calculates a focal distance to the projection target surface from the diffusely-reflected light; a first holding unit that holds the light source unit, the light projection lens unit, and the light receiving lens unit; a second holding unit that holds the light receiving unit, and is mounted on the first holding unit; and a pressing unit that presses the second holding unit against the first holding unit. The second holding unit is configured to be displaceable on a surface of the first holding unit along a groove portion formed thereon.Type: GrantFiled: October 24, 2013Date of Patent: January 26, 2016Assignee: RICOH COMPANY, LIMITEDInventors: Satoshi Tsuchiya, Masamichi Yamada, Yasunari Mikutsu, Hideo Namba, Hideo Kanai, Naoyuki Ishikawa, Motohisa Ikeda
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Patent number: 9128359Abstract: An electronic device includes a speaker; a speaker holder that holds the speaker; a main unit on which the speaker holder is mounted; a first mounting part formed on the speaker; a second mounting part formed on the speaker holder; a first elastic part that engages with both the first and second mounting parts; a third mounting part formed on the speaker holder; a fourth mounting part formed on the main unit; and a second elastic part that engages with both the third and fourth mounting parts. The speaker and the main unit are provided in such a manner as not to come into contact with each other under the condition that the first and second mounting parts engage with the first elastic part, and the third and fourth mounting parts engage with the second elastic part.Type: GrantFiled: August 23, 2013Date of Patent: September 8, 2015Assignee: RICOH COMPANY, LIMITEDInventors: Masamichi Yamada, Hideo Namba, Satoshi Tsuchiya, Yasunari Mikutsu, Hideo Kanai, Naoyuki Ishikawa, Motohisa Ikeda
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Patent number: 9110360Abstract: An image projection apparatus includes a housing unit; a light source unit provided on the housing unit; an outer cover mounted on the housing unit; a second cover provided nearer to the light source unit than the outer cover; a first mounting member formed on the housing unit; a second mounting member formed on the outer cover and fixing the outer cover to the housing unit when mounted on the first mounting member; a displacement member movable to both a position where mounting of the second mounting member to the first mounting member is inhibited and a position where mounting of the second mounting member to the first mounting member is permitted; and a displacement control member that moves the displacement member to the position where the mounting of the second mounting member to the first mounting member is permitted when the second cover is correctly mounted.Type: GrantFiled: August 12, 2013Date of Patent: August 18, 2015Assignee: RICOH COMPANY, LIMITEDInventors: Yasunari Mikutsu, Hideo Namba, Satoshi Tsuchiya, Naoyuki Ishikawa, Hideo Kanai, Motohisa Ikeda, Masamichi Yamada
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Patent number: 9104093Abstract: An illumination optical system includes a lens unit that is arranged on a path of an emitted light to an image forming element for forming an image; a holding unit that holds the lens unit; and an elastic body that is attached to the holding unit, and has integrally-formed first and second parts, the first part being biased in a direction of an optical axis of the light to press the lens unit, and the second part being biased in a direction perpendicular to the direction of the optical axis to press the lens unit.Type: GrantFiled: September 26, 2013Date of Patent: August 11, 2015Assignee: RICOH COMPANY, LIMITEDInventors: Tetsuya Fujioka, Masamichi Yamada, Yasunari Mikutsu, Hideo Kanai, Satoshi Tsuchiya, Naoyuki Ishikawa, Motohisa Ikeda
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Publication number: 20140132938Abstract: An auto-focus device includes: a light projection lens unit that projects light emitted from a light source unit, on a projection target surface; a light receiving unit that receives a diffusely-reflected light from the projection target surface; a light receiving lens unit that guides the diffusely-reflected light to the light receiving unit; a calculating unit that calculates a focal distance to the projection target surface from the diffusely-reflected light; a first holding unit that holds the light source unit, the light projection lens unit, and the light receiving lens unit; a second holding unit that holds the light receiving unit, and is mounted on the first holding unit; and a pressing unit that presses the second holding unit against the first holding unit. The second holding unit is configured to be displaceable on a surface of the first holding unit along a groove portion formed thereon.Type: ApplicationFiled: October 24, 2013Publication date: May 15, 2014Inventors: Satoshi TSUCHIYA, Masamichi Yamada, Yasunari Mikutsu, Hideo Namba, Hideo Kanai, Naoyuki Ishikawa, Motohisa Ikeda
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Publication number: 20140118706Abstract: An illumination optical system includes a lens unit that is arranged on a path of an emitted light to an image forming element for forming an image; a holding unit that holds the lens unit; and an elastic body that is attached to the holding unit, and has integrally-formed first and second parts, the first part being biased in a direction of an optical axis of the light to press the lens unit, and the second part being biased in a direction perpendicular to the direction of the optical axis to press the lens unit.Type: ApplicationFiled: September 26, 2013Publication date: May 1, 2014Inventors: Tetsuya FUJIOKA, Masamichi Yamada, Yasunari Mikutsu, Hideo Kanai, Satoshi Tsuchiya, Naoyuki Ishikawa, Motohisa Ikeda
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Publication number: 20140072158Abstract: An electronic device includes a speaker; a speaker holder that holds the speaker; a main unit on which the speaker holder is mounted; a first mounting part formed on the speaker; a second mounting part formed on the speaker holder; a first elastic part that engages with both the first and second mounting parts; a third mounting part formed on the speaker holder; a fourth mounting part formed on the main unit; and a second elastic part that engages with both the third and fourth mounting parts. The speaker and the main unit are provided in such a manner as not to come into contact with each other under the condition that the first and second mounting parts engage with the first elastic part, and the third and fourth mounting parts engage with the second elastic part.Type: ApplicationFiled: August 23, 2013Publication date: March 13, 2014Inventors: Masamichi YAMADA, Hideo Namba, Satoshi Tsuchiya, Yasunari Mikutsu, Hideo Kanai, Naoyuki Ishikawa, Motohisa Ikeda
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Publication number: 20140071410Abstract: An image projection apparatus includes a housing unit; a light source unit provided on the housing unit; an outer cover mounted on the housing unit; a second cover provided nearer to the light source unit than the outer cover; a first mounting member formed on the housing unit; a second mounting member formed on the outer cover and fixing the outer cover to the housing unit when mounted on the first mounting member; a displacement member movable to both a position where mounting of the second mounting member to the first mounting member is inhibited and a position where mounting of the second mounting member to the first mounting member is permitted; and a displacement control member that moves the displacement member to the position where the mounting of the second mounting member to the first mounting member is permitted when the second cover is correctly mounted.Type: ApplicationFiled: August 12, 2013Publication date: March 13, 2014Inventors: Yasunari MIKUTSU, Hideo NAMBA, Satoshi TSUCHIYA, Naoyuki ISHIKAWA, Hideo KANAI, Motohisa IKEDA, Masamichi YAMADA
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Patent number: 8022753Abstract: A semiconductor integrated circuit that carries out intermittent operation, includes a processor block; an logical operation block other than a processor; a first switch part configured to supply a normal operation voltage to the logical operation block other than a processor; a second switch part configured to supply the normal operation voltage to the processor block; a third switch part configured to supply a data holding voltage lower than the normal operation voltage to the processor block; and a fourth switch part configured to be turned on, when the second switch means is turned off and the third switch means is turned on, and supply the data holding voltage to the processor block.Type: GrantFiled: January 15, 2010Date of Patent: September 20, 2011Assignee: Fujitsu LimitedInventor: Motohisa Ikeda
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Publication number: 20100117714Abstract: A semiconductor integrated circuit that carries out intermittent operation, includes a processor block; an logical operation block other than a processor; a first switch part configured to supply a normal operation voltage to the logical operation block other than a processor; a second switch part configured to supply the normal operation voltage to the processor block; a third switch part configured to supply a data holding voltage lower than the normal operation voltage to the processor block; and a fourth switch part configured to be turned on, when the second switch means is turned off and the third switch means is turned on, and supply the data holding voltage to the processor block.Type: ApplicationFiled: January 15, 2010Publication date: May 13, 2010Applicant: FUJITSU LIMITEDInventor: Motohisa IKEDA
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Patent number: 7706173Abstract: In a memory macro which can more largely reduce a leak current of a memory cell in a hold state, a power voltage between a power potential and a reference potential is supplied across power terminals of each CMOS inverter (across source electrodes of loading P channel FETs and source electrodes of driving N channel FETs) forming the memory cell when a word line is on (high level), a hold enable voltage which is lower than the power voltage and equal to or higher than a lower limit voltage for enabling data to be held (voltage between a potential dropped lower than the power potential and the reference potential) is supplied between the power terminals when the word line is turned off (low level), and the power voltage is constantly supplied to a back gate electrode of one FET within each CMOS inverter.Type: GrantFiled: November 30, 2007Date of Patent: April 27, 2010Assignee: Fujitsu LimitedInventor: Motohisa Ikeda
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Publication number: 20080170459Abstract: In a memory macro which can more largely reduce a leak current of a memory cell in a hold state, a power voltage between a power potential and a reference potential is supplied across power terminals of each CMOS inverter (across source electrodes of loading P channel FETs and source electrodes of driving N channel FETs) forming the memory cell when a word line is on (high level), a hold enable voltage which is lower than the power voltage and equal to or higher than a lower limit voltage for enabling data to be held (voltage between a potential dropped lower than the power potential and the reference potential) is supplied between the power terminals when the word line is turned off (low level), and the power voltage is constantly supplied to a back gate electrode of one FET within each CMOS inverter.Type: ApplicationFiled: November 30, 2007Publication date: July 17, 2008Inventor: Motohisa Ikeda
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Patent number: 5502327Abstract: A semiconductor device includes a first layer made of a first type semiconductor, a second layer provided on the first layer and made of a second type semiconductor, the second layer including low resistance diffusion parts and high resistance diffusion parts, where the first and second type semiconductors are one and the other of n-type and p-type semiconductors, a third layer provided on the low resistance diffusion parts of the second layer and made of the first semiconductor type, thereby forming a pair of transistors which form a flip-flop and use the high resistance diffusion parts as balanced load resistors, and at least first and second isolations isolating the flip-flop.Type: GrantFiled: August 10, 1994Date of Patent: March 26, 1996Assignee: Fujitsu LimitedInventor: Motohisa Ikeda
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Patent number: 4855958Abstract: A semiconductor integrated circuit device has a logic macro and RAM macros, and each RAM macro has a plurality of latch circuits, an operation circuit and a memory cell array. At least one of outputs of the latch circuits within the RAM macro is coupled to the operation circuit thereof by a first interconnection when the RAM macro is used. When the RAM macro is not used, all of the outputs of the latch circuits are coupled to certain internal cells of the logic macro by a second interconnection. The first and second interconnections are determined by a function to be carried out in the circuit device, that is, designed by CAD, for example, depending on the kind or model of the circuit device.Type: GrantFiled: August 17, 1988Date of Patent: August 8, 1989Assignee: Fujitsu LimitedInventor: Motohisa Ikeda