Abstract: This invention provides a command system for efficiently performing information processing. An information processing apparatus 1000 includes a main processor 200 which exercises centralized control on the entire apparatus, a graphic processor 100 which performs image processing operations, and a main memory 50. The graphic processor 100 includes a control unit 20 which exercises centralized control on the graphic processor, and a graphic operation unit 40 which performs graphic processing in accordance with a command given through the control unit. The control unit 20 includes: an interface part 22 which exchanges data with the main processor 200; a command analysis part 24 which analyzes a command system included in data received from the main processor, the command system including a set of non-graphic processing type commands; and an execution part 26 which executes analyzed commands.

Abstract: There is provided a graphics processing system that includes a main processing unit and a graphics processing unit (GPU). The main processing unit puts rendering commands generated using a graphics library in the queue of a command buffer in a main memory. In this process, the library function offered by the graphics library is converted into the rendering commands, without any rendering attributes retained in the library. The GPU reads and executes the rendering commands stacked in the command buffer, and generates rendering data in a frame buffer.

Abstract: There is provided a graphics processing system that includes a main processing unit and a graphics processing unit (GPU). The main processing unit puts rendering commands generated using a graphics library in the queue of a command buffer in a main memory. In this process, the library function offered by the graphics library is converted into the rendering commands, without any rendering attributes retained in the library. The GPU reads and executes the rendering commands stacked in the command buffer, and generates rendering data in a frame buffer.

Abstract: The invention is provided to improve the information processing efficiency of a multiprocessor system. An information processing apparatus 1000 comprises a main processor 200 for exercising centralized control on the entire apparatus, a graphic processor 100 for performing image processing operations, and a main memory 50. The information processing apparatus 1000 also comprises a DMA controller 28 which controls m (m is an integer, m>1) pieces of data transfer simultaneously, a main memory 50 for data intended for the particular processing is expanded first, and a group of n (n is an integer, n>m) buffers 12 for storing data when the data is transferred from the main memory 50. When a plurality of data transfers are performed simultaneously, a first buffer out of the group of buffers 12 is set as the destination of one of the data transfers, and a second buffer is set as the destination of another data transfer.

Abstract: A graphic memory is space-divided into a first area and a second area. In the first area, a task corresponding to a predetermined application is executed regardless of which task is processed by a main processor. A switchable area is divided in time so that data related to tasks corresponding to a plurality of applications is sequentially stored in the switchable area in accordance with task switching in the main processor.

Abstract: There is provided a graphics processing system that includes a main processing unit and a graphics processing unit (GPU). The main processing unit puts rendering commands generated using a graphics library in the queue of a command buffer in a main memory. In this process, the library function offered by the graphics library is converted into the rendering commands, without any rendering attributes retained in the library. The GPU reads and executes the rendering commands stacked in the command buffer, and generates rendering data in a frame buffer.

Abstract: There is provided a graphics processing system that includes a main processing unit and a graphics processing unit (GPU). The main processing unit puts rendering commands generated using a graphics library in the queue of a command buffer in a main memory. In this process, the library function offered by the graphics library is converted into the rendering commands, without any rendering attributes retained in the library. The GPU reads and executes the rendering commands stacked in the command buffer, and generates rendering data in a frame buffer.

Abstract: This invention provides a command system for efficiently performing information processing. An information processing apparatus 1000 includes a main processor 200 which exercises centralized control on the entire apparatus, a graphic processor 100 which performs image processing operations, and a main memory 50. The graphic processor 100 includes a control unit 20 which exercises centralized control on the graphic processor, and a graphic operation unit 40 which performs graphic processing in accordance with a command given through the control unit. The control unit 20 includes: an interface part 22 which exchanges data with the main processor 200; a command analysis part 24 which analyzes a command system included in data received from the main processor, the command system including a set of non-graphic processing type commands; and an execution part 26 which executes analyzed commands.

Abstract: The invention is provided to improve the information processing efficiency of a multiprocessor system. An information processing apparatus 1000 comprises a main processor 200 for exercising centralized control on the entire apparatus, a graphic processor 100 for performing image processing operations, and a main memory 50. The information processing apparatus 1000 also comprises a DMA controller 28 which controls m (m is an integer, m>1) pieces of data transfer simultaneously, a main memory 50 for data intended for the particular processing is expanded first, and a group of n (n is an integer, n>m) buffers 12 for storing data when the data is transferred from the main memory 50. When a plurality of data transfers are performed simultaneously, a first buffer out of the group of buffers 12 is set as the destination of one of the data transfers, and a second buffer is set as the destination of another data transfer.

Abstract: A graphic memory is space-divided into a first area and a second area. In the first area, a task corresponding to a predetermined application is executed regardless of which task is processed by a main processor. A switchable area is divided in time so that data related to tasks corresponding to a plurality of applications is sequentially stored in the switchable area in accordance with task switching in the main processor.