Abstract: An information processing system may not degrade a processor, if the system is designed so as to satisfy connection restrictions between processors and chipsets. In the system a route switching function is provided to control the connection between a CPU and a BIOS ROM among a plurality of CPUs and the BIOS ROM. When a fault occurs in a particular CPU, a route connecting the BIOS ROM and another CPU in which a fault does not occur is determined, and then the route switching is performed on the basis of the determined route information.