Patents by Inventor Motoji Murakami

Motoji Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Manufacturing method of semiconductor integrated circuit device
    Patent number: 7534629
    Abstract: By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: May 19, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Teruo Shoji, Akio Hasebe, Yoshinori Deguchi, Motoji Murakami, Masayoshi Okamoto, Yasunori Narizuka, Susumu Kasukabe
  • Manufacturing method of semiconductor integrated circuit device
    Publication number: 20060281222
    Abstract: By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 14, 2006
    Inventors: Teruo Shoji, Akio Hasebe, Yoshinori Deguchi, Motoji Murakami, Masayoshi Okamoto, Yasunori Narizuka