Patents by Inventor Motoki Furukawa

Motoki Furukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220061295
    Abstract: A fishing tool identification device according to an embodiment of the present disclosure is attachable to a fishing tool, and is configured to include a tag identification portion capable of reading an identification tag that identifies the fishing tool.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 3, 2022
    Inventor: Motoki FURUKAWA
  • Patent number: 4951121
    Abstract: A semiconductor device comprising a compound semiconductor substrate whose surface is provided with a source region, a drain region and an interventing channel region; a source electrode formed on said source region; a drain electrode mounted on said drain region; and a 3-ply gate electrode formed on said channel region and consisting of a high melting metal layer, a barrier metal layer and a gold layer in that order.
    Type: Grant
    Filed: December 28, 1989
    Date of Patent: August 21, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motoki Furukawa, Yoshihiro Kishita, Tatsuro Mitani
  • Patent number: 4674174
    Abstract: Disclosed is a method for forming a conductor pattern which comprises the steps of forming a conductive layer on a semiconductor substrate, forming a photoresist film on the conductive layer, removing that portion of the photoresist film located on a conductor pattern forming region of the conductive layer, forming a first masking metal film over the whole surface of the resultant structure, removing the photoresist film along with that portion of the first masking metal film formed thereon so that a portion of the first masking film remains on the conductor pattern forming region of the conductive layer to form a first masking metal pattern, and selectively removing the conductive layer by anisotropic etching to form the conductor pattern.Since the selective removal of the conductor layer is accomplished by the use of the metal pattern as a mask, it is possible to form a much finer conductor pattern than is obtained with the use of the photoresist pattern as the mask.
    Type: Grant
    Filed: October 11, 1985
    Date of Patent: June 23, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Kishita, Motoki Furukawa, Tatsuro Mitani
  • Patent number: 4650543
    Abstract: A method of forming an electrode pattern on a surface of a semiconductor substrate which comprises the steps of forming a metal film which is vulnerable to a reactive ion etching on a surface of the semiconductor substrate, forming on the metal film another metal film which is vulnerable to an ion milling but is resistant to the reactive ion etching, forming a resist pattern on the another metal film, selectively etching the another metal film by the ion milling using the resist pattern as a mask, and selectively etching the metal film by the reactive ion etching using the another metal film as a mask. A semiconductor device having an electrode pattern as formed by the above method is also disclosed.
    Type: Grant
    Filed: February 28, 1985
    Date of Patent: March 17, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Kishita, Motoki Furukawa, Tatsuro Mitani