Patents by Inventor Mototsugu FUJIMITSU

Mototsugu FUJIMITSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • APPARATUSES AND METHODS FOR COUPLING DATA LINES IN MEMORY DEVICES
    Publication number: 20190304516
    Abstract: Apparatuses and methods for coupling data lines in a memory device are disclosed. An example apparatus includes first and second local IO lines, first and second global IO lines, and a control circuit. The control circuit is configured in a write operation to bring the first local IO line and the first global IO line to one of first and second combinations in logic level and the second local IO line and the second global IO line to the other of the first and second combinations in logic level, and further configured in a read operation to cause the first local IO line and the first global IO line into to one of third and fourth combinations in logic level and the second local IO line and the second global IO line to the other of the third and fourth combinations in logic level.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 3, 2019
    Applicant: Micron Technology, Inc.
    Inventors: Hideo Shimizu, Makoto Kitayama, Mototsugu Fujimitsu
  • Semiconductor device including a pair of shield lines
    Patent number: 8847431
    Abstract: A semiconductor device includes a first circuit, a second circuit, a first wire, and a pair of shield lines. The first circuit includes a voltage generating circuit generating a predetermined voltage and produces the predetermined voltage at an output end thereof. The first wire connects the output end of the first circuit to an input end of the second circuit. The pair of shield lines is disposed so as to sandwich the first wire therebetween. One of the shield lines is supplied with a power supply potential for driving at least one of the voltage generating circuit and the second circuit. Another of the shield lines is supplied with a ground potential for driving at least one of the voltage generating circuit and the second circuit.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: September 30, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventors: Taihei Shido, Mototsugu Fujimitsu, Nobuhiro Oodaira, Naoki Kitai
  • SEMICONDUCTOR DEVICE INCLUDING A PAIR OF SHIELD LINES
    Publication number: 20120112563
    Abstract: A semiconductor device includes a first circuit, a second circuit, a first wire, and a pair of shield lines. The first circuit includes a voltage generating circuit generating a predetermined voltage and produces the predetermined voltage at an output end thereof. The first wire connects the output end of the first circuit to an input end of the second circuit. The pair of shield lines is disposed so as to sandwich the first wire therebetween. One of the shield lines is supplied with a power supply potential for driving at least one of the voltage generating circuit and the second circuit. Another of the shield lines is supplied with a ground potential for driving at least one of the voltage generating circuit and the second circuit.
    Type: Application
    Filed: November 4, 2011
    Publication date: May 10, 2012
    Applicant: Elpida Memory, Inc.
    Inventors: Taihei SHIDO, Mototsugu FUJIMITSU, Nobuhiro OODAIRA, Naoki KITAI