Patents by Inventor Motoyasu Takabatake

Motoyasu Takabatake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10489271
    Abstract: The size of a multi-processor is prevented from increasing even when the number of processor cores is increased. The multi-processor includes a plurality of cores and a debugging control unit. At least one of the plurality of cores is a debugging core, the debugging core being connected to the debugging control unit so that the debugging control unit can refer to and update register information in the debugging core. The debugging control unit transfers register information in a first core to the debugging core, the first core being one of the plurality of cores and being a core to be debugged. The debugging core debugs a program by using the transferred register information, the program being executed in the first core.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: November 26, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Motoyasu Takabatake, Hisashi Shiota, Atsushi Nakamura, Yuji Chiba
  • Patent number: 10108476
    Abstract: The execution time of a self diagnosis program is reduced. A compiler apparatus includes: a specify unit that specifies, out of a plurality of resources included in a diagnosis target apparatus, a use resource group being a set of resources used by an instruction string included in an object program executed on the diagnosis target apparatus; a determine unit that determines, in accordance with the specified use resource group, a target resource group being a set of resources to be targets of a self diagnosis in the diagnosis target apparatus; and an output unit that outputs, for causing the self diagnosis on the determined target resource group to be executed in the diagnosis target apparatus, information based on the target resource group to the diagnosis target apparatus.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: October 23, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Motoyasu Takabatake, Akihiro Yamamoto, Atsushi Nakamura
  • Publication number: 20180150386
    Abstract: The size of a multi-processor is prevented from increasing even when the number of processor cores is increased. The multi-processor includes a plurality of cores and a debugging control unit. At least one of the plurality of cores is a debugging core, the debugging core being connected to the debugging control unit so that the debugging control unit can refer to and update register information in the debugging core. The debugging control unit transfers register information in a first core to the debugging core, the first core being one of the plurality of cores and being a core to be debugged. The debugging core debugs a program by using the transferred register information, the program being to be executed in the first core.
    Type: Application
    Filed: October 24, 2017
    Publication date: May 31, 2018
    Inventors: Motoyasu TAKABATAKE, Hisashi SHIOTA, Atsushi NAKAMURA, Yuji CHIBA
  • Patent number: 9785547
    Abstract: A data management apparatus for reducing the occurrence of garbage collection, and preventing deterioration in the performance of writing data into an SSD. The data management apparatus includes a data management unit which manages key-value data stored in the SSD, and a file management unit which creates a file of a predetermined size in accordance with a request from the data management unit, and manages the created file. The file management unit creates a file having a size of an integral multiple of a block in the SSD, the data management unit requests file management unit to write the key-value data to be stored in the file, and manages a number of the effective key-value data in each file by invalidating pre-update data of the updated key-value data and the deleted key-value data, and requests the file management unit to delete the file no longer storing the effective key-value data.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: October 10, 2017
    Assignee: HITACHI, LTD.
    Inventor: Motoyasu Takabatake
  • Publication number: 20170147264
    Abstract: An image processing apparatus includes: a first memory that stores image data; a second memory that can be accessed at a speed higher than that in an access to the first memory; a first operation unit that executes a predetermined task on a predetermined area of the image data transferred from the first memory to the second memory; a second operation unit that determines whether there is an overlapping part of a first area of the image data executed corresponding to a first task executed by the first operation unit and a second area of the image data executed corresponding to a second task different from the first task; and a memory control apparatus that controls the first memory and the second memory. The memory control apparatus performs control to reuse the image data in the second memory when it is determined that there is an overlapping part.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 25, 2017
    Inventors: Motoyasu Takabatake, Hisashi Shiota, Atsushi Nakamura, Manabu Koike
  • Publication number: 20160188461
    Abstract: A data management apparatus for reducing the occurrence of garbage collection, and preventing deterioration in the performance of writing data into an SSD. The data management apparatus includes a data management unit which manages key-value data stored in the SSD, and a file management unit which creates a file of a predetermined size in accordance with a request from the data management unit, and manages the created file. The file management unit creates a file having a size of an integral multiple of a block in the SSD, the data management unit requests file management unit to write the key-value data to be stored in the file, and manages a number of the effective key-value data in each file by invalidating pre-update data of the updated key-value data and the deleted key-value data, and requests the file management unit to delete the file no longer storing the effective key-value data.
    Type: Application
    Filed: February 13, 2014
    Publication date: June 30, 2016
    Applicant: HITACHI, LTD.
    Inventor: Motoyasu TAKABATAKE
  • Publication number: 20160062812
    Abstract: The execution time of a self diagnosis program is reduced. A compiler apparatus includes: a specify unit that specifies, out of a plurality of resources included in a diagnosis target apparatus, a use resource group being a set of resources used by an instruction string included in an object program executed on the diagnosis target apparatus; a determine unit that determines, in accordance with the specified use resource group, a target resource group being a set of resources to be targets of a self diagnosis in the diagnosis target apparatus; and an output unit that outputs, for causing the self diagnosis on the determined target resource group to be executed in the diagnosis target apparatus, information based on the target resource group to the diagnosis target apparatus.
    Type: Application
    Filed: August 13, 2015
    Publication date: March 3, 2016
    Applicant: Renesas Electronics Corporation
    Inventors: Motoyasu TAKABATAKE, Akihiro YAMAMOTO, Atsushi NAKAMURA
  • Publication number: 20060107258
    Abstract: A program which causes an information processing system storing program code containing a plurality of routines to execute the following steps to perform inter-procedural optimization on part of the program code. The system generates a clone of each routine that is going to be called by another routine from among the routines contained in the program code; replaces each instruction calling an other routine and being contained in one of the routines and the clones forming the program code with an instruction calling the clone of the other routine; and rewrites instructions contained in each of the clones forming part of the program code so as to optimize information processing implemented by a routine or a clone that calls the each of the clones.
    Type: Application
    Filed: November 8, 2005
    Publication date: May 18, 2006
    Inventor: Motoyasu Takabatake