Patents by Inventor Motoyasu Tsunoda
Motoyasu Tsunoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8850128Abstract: A method for implementing data storage and a dual port, dual element storage device are provided. A storage device includes a predefined form factor including a first port and a second port, and a first storage element and a second storage element. A controller coupled between the first port and second port, and the first storage element and second storage element controls access and provides two separate data paths to the first storage element and second storage element.Type: GrantFiled: December 23, 2009Date of Patent: September 30, 2014Assignee: HGST Netherlands B.V.Inventors: Frank R. Chu, Spencer W. Ng, Motoyasu Tsunoda, Marco Sanvido
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Patent number: 8223563Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: GrantFiled: April 13, 2011Date of Patent: July 17, 2012Assignee: Renesas Electronics CorporationInventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Publication number: 20110283054Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: ApplicationFiled: April 13, 2011Publication date: November 17, 2011Inventors: KENJI KOZAKAI, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Publication number: 20110153959Abstract: A method for implementing data storage and a dual port, dual element storage device are provided. A storage device includes a predefined form factor including a first port and a second port, and a first storage element and a second storage element. A controller coupled between the first port and second port, and the first storage element and second storage element controls access and provides two separate data paths to the first storage element and second storage element.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Applicant: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Frank R. Chu, Spencer W. Ng, Motoyasu Tsunoda, Marco Sanvido
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Patent number: 7933158Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: GrantFiled: October 1, 2010Date of Patent: April 26, 2011Assignee: Renesas Electronics CorporationInventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Publication number: 20110022913Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: ApplicationFiled: October 1, 2010Publication date: January 27, 2011Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Patent number: 7817480Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: GrantFiled: March 23, 2009Date of Patent: October 19, 2010Assignee: Renesas Electronics CorporationInventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Patent number: 7694067Abstract: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.Type: GrantFiled: January 16, 2008Date of Patent: April 6, 2010Assignee: Renesas Technology Corp.Inventors: Nagamasa Mizushima, Takashi Tsunehiro, Motoyasu Tsunoda, Toshio Tanaka, Kunihiro Katayama, Koichi Kimura, Tomihisa Hatano
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Patent number: 7650503Abstract: A memory card has: a flash memory chip for storing digital certificates and a seed of random numbers; a controller chip which can execute a managing process for managing the digital certificates and a random number generating process for generating the pseudo random numbers by using the seed of random numbers; and an IC card chip which can execute an authenticating process for authenticating personal identification information (PIN) inputted from a host apparatus and an encrypting process for encrypting the seed of random numbers. Thus, a processing time of security processes is reduced while assuring safety of the security processes.Type: GrantFiled: November 13, 2007Date of Patent: January 19, 2010Assignee: Renesas Technology Corp.Inventors: Nagamasa Mizushima, Motoyasu Tsunoda, Kunihiro Katayama
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Patent number: 7596703Abstract: An agent computer system, acting on behalf of the user, provides the personal information to various wide area network sites for conducting online transactions. A user has a secure device with a built-in device identifier. A backup center has a computer system to be coupled to the secure device during backup of the personal information. The personal information is encrypted with a unique user ID as a key. The user ID is entered by the user. The user ID is irreversibly encrypted to a unique irreversibly encrypted user identifier. The secure device includes data executable to establish a new account, renew an old account, and transmission of the encrypted information along with the unique device identifier and the unique irreversibly encrypted user identifier to the backup center. The unique device identifier and the unique irreversibly encrypted user identifier are used for indexing the storage of the encrypted information.Type: GrantFiled: March 21, 2003Date of Patent: September 29, 2009Assignee: Hitachi, Ltd.Inventors: Tomohisa Kohiyama, Motoyasu Tsunoda
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Publication number: 20090187702Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: ApplicationFiled: March 23, 2009Publication date: July 23, 2009Inventors: Kenji KOZAKAI, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Patent number: 7525852Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: GrantFiled: March 13, 2008Date of Patent: April 28, 2009Assignee: Renesas Technology Corp.Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Publication number: 20090013125Abstract: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.Type: ApplicationFiled: January 16, 2008Publication date: January 8, 2009Inventors: Nagamasa MIZUSHIMA, Takashi Tsunehiro, Motoyasu Tsunoda, Toshio Tanaka, Kunihiro Katayama, Koichi Kimura, Tomihisa Hatano
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Patent number: 7430085Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: August 22, 2006Date of Patent: September 30, 2008Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventors: Motoyasu Tsunoda, Yukie Miyazawa, legal representative, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Shoichi Miyazawa
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Patent number: 7415729Abstract: A storage device allows expanding user utilizable applications by storing information permitted to be read according to a certificate and information permitted to be read according to information determined by a user. An information distributor receives a certificate from the storage device and after verifying the certificate, transmits data of a license and access control conditions to the storage device. After receiving data of a certificate from an information browser, verifying the certificate and imposing a limit on access based upon one of access control conditions, the storage device transmits data of the license and the other to the information browser. The information browser permits utilization of the license under the limitation defined by the access control condition. The certificate includes either or both of a certificate approved by a certificate authority and a PIN (personal identifying number) determined by the user.Type: GrantFiled: June 18, 2003Date of Patent: August 19, 2008Assignee: Hitachi, Ltd.Inventors: Masaharu Ukeda, Motoyasu Tsunoda, Nagamasa Mizushima, Kunihiro Katayama
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Patent number: 7411757Abstract: A hybrid disk drive, i.e., a disk drive with two types of permanent storage media (conventional disk media and nonvolatile memory, such as flash memory), uses its nonvolatile memory in operational modes other than the power-save or “standby” mode wherein the disks are spun down. In a first additional mode, called a “performance” mode, one or more blocks of write data are destaged from volatile memory (the disk drive's write cache) and written to the disk and simultaneously one or more data blocks of write data are destaged from the volatile memory and written to the nonvolatile memory. In a second additional mode, called a “harsh-environment” mode, the disk drive includes one or more environmental sensors, such as temperature and humidity sensors, and the nonvolatile memory temporarily replaces the disks as the permanent storage media.Type: GrantFiled: July 27, 2006Date of Patent: August 12, 2008Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Frank R. Chu, Richard M. H. New, Spencer W. Ng, Motoyasu Tsunoda
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Patent number: 7406562Abstract: An information read/write device has a first processor for instructing a second processor to write information onto or read information from a recording medium. The recording medium has a random access memory module which allows both processors to read or write data to the memory module. The second processor controls a scanning module for the recording medium, a write signal processing module and a read signal processing module. The read/write device is easy-to-operate while using a minimum of electric power consumption with prevention against electromagnetic interference (EMI) making the invention suitable for use in hand-held devices.Type: GrantFiled: April 10, 2006Date of Patent: July 29, 2008Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Hideki Saga, Motoyasu Tsunoda, Terumi Takashi
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Publication number: 20080158963Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: ApplicationFiled: March 13, 2008Publication date: July 3, 2008Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Patent number: 7366034Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.Type: GrantFiled: May 8, 2007Date of Patent: April 29, 2008Assignee: Renesas Technology Corp.Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
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Publication number: 20080082825Abstract: A memory card has: a flash memory chip for storing digital certificates and a seed of random numbers; a controller chip which can execute a managing process for managing the digital certificates and a random number generating process for generating the pseudo random numbers by using the seed of random numbers; and an IC card chip which can execute an authenticating process for authenticating personal identification information (PIN) inputted from a host apparatus and an encrypting process for encrypting the seed of random numbers. Thus, a processing time of security processes is reduced while assuring safety of the security processes.Type: ApplicationFiled: November 13, 2007Publication date: April 3, 2008Inventors: Nagamasa Mizushima, Motoyasu Tsunoda, Kunihiro katayama