Patents by Inventor Moty Mehalel

Moty Mehalel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuits and methods for reducing minimum supply for register file cells
    Patent number: 8824198
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 2, 2014
    Assignee: Intel Corporation
    Inventors: Vivek K. De, DiaaEidin S. Khalil, Muhammad M. Khellah, Moty Mehalel, George Shchupak
  • CIRCUITS AND METHODS FOR REDUCING MINIMUM SUPPLY FOR REGISTER FILE CELLS
    Publication number: 20130279241
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Application
    Filed: May 30, 2013
    Publication date: October 24, 2013
    Inventors: Vivek K. DE, DiaaEldin S. KHALIL, Muhammad M. KHELLAH, Moty MEHALEL, George SHCHUPAK
  • Circuits and methods for reducing minimum supply for register file cells
    Patent number: 8462541
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: June 11, 2013
    Assignee: Intel Corporation
    Inventors: Vivek De, DiaaEldin S. Khalil, Muhammad Khellah, Moty Mehalel, George Shchupak
  • CIRCUITS AND METHODS FOR REDUCING MINIMUM SUPPLY FOR REGISTER FILE CELLS
    Publication number: 20120106285
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Application
    Filed: January 10, 2012
    Publication date: May 3, 2012
    Inventors: Vivek De, DiaaEldin S. Khalil, Muhammad Khellah, Moty Mehalel, George Shchupak
  • Circuits and methods for reducing minimum supply for register file cells
    Patent number: 8111579
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: February 7, 2012
    Assignee: Intel Corporation
    Inventors: Vivek De, DiaaEldin S. Khalil, Muhammad Khellah, Moty Mehalel, George Shchupak
  • Tracking health of integrated circuit structures
    Patent number: 7877666
    Abstract: Methods and apparatus to track the health of integrated circuit structures are described. In an embodiment, a counter may be updated when the status of a portion of a storage unit (e.g., a cache) transitions to a defective status (e.g., as determined by reference to one or more corresponding status bits). The value stored in the counter may be compared with a threshold value, e.g., to generate a signal that is indicative of whether the threshold value has been exceeded. Other embodiments are also described.
    Type: Grant
    Filed: December 30, 2006
    Date of Patent: January 25, 2011
    Assignee: Intel Corporation
    Inventors: John H. Crawford, Tsvika Kurts, Moty Mehalel
  • Circuts and methods for reducing minimum supply for register file cells
    Publication number: 20100118637
    Abstract: A register file employing a shared supply structure to improve the minimum supply voltage.
    Type: Application
    Filed: November 10, 2008
    Publication date: May 13, 2010
    Inventors: Vivek De, DiaaElden S. Khalil, Muhammad Kellah, Moty Mehalel, George Shchupak
  • Method and apparatus of reporting memory bit correction
    Patent number: 7590913
    Abstract: Briefly, a method, main processing unit and a computer system to report a failure in a bit of a memory line by updating first and second counters for a first time and a second time correction of bit failures in a line, respectively. The updating of first and second counters after a third time correction of bit failure in the line is disabled.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: September 15, 2009
    Assignee: Intel Corporation
    Inventors: Tsvika Kurts, Moty Mehalel, Julius Mandelblat, Alexander Gendler
  • Lowering voltage for cache memory operation
    Patent number: 7424663
    Abstract: Setting a minimum operating voltage (Vcc min) of the cache to a voltage value at which the number of cells that fail in the cache is between approximately 0.1% and approximately 1% of the number of lines in the cache, while the remaining cells continue to function correctly at the voltage value chosen for Vcc min, and compensating for errors produced by memory cells in the cache that fail when operated at the voltage value chosen for Vcc min.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventor: Moty Mehalel
  • TRACKING HEALTH OF INTEGRATED CIRCUIT STRUCTURES
    Publication number: 20080163014
    Abstract: Methods and apparatus to track the health of integrated circuit structures are described. In an embodiment, a counter may be updated when the status of a portion of a storage unit (e.g., a cache) transitions to a defective status (e.g., as determined by reference to one or more corresponding status bits). The value stored in the counter may be compared with a threshold value, e.g., to generate a signal that is indicative of whether the threshold value has been exceeded. Other embodiments are also described.
    Type: Application
    Filed: December 30, 2006
    Publication date: July 3, 2008
    Inventors: John H. Crawford, Tsvika Kurts, Moty Mehalel
  • Method and apparatus of reporting memory bit correction
    Publication number: 20070165041
    Abstract: Briefly, a method, main processing unit and a computer system to report a failure in a bit of a memory line by updating first and second counters for a first time and a second time correction of bit failures in a line, respectively. The updating of first and second counters after a third time correction of bit failure in the line is disabled.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 19, 2007
    Inventors: Tsvika Kurts, Moty Mehalel, Julius Mandelblat, Alexander Gendler
  • Adaptive delay of timing control signals
    Patent number: 7187224
    Abstract: Embodiments of the present invention relate to a circuit that varies the delay time of a clock signal in response to a frequency of the clock signal. The circuit may include a sensor and a delay circuit. The sensor may output a determination of the frequency of the clock signal. The delay time of the delay circuit may be responsive to the determination of a frequency of the clock signal. Accordingly, when the frequency of a clock signal varies, a delay of that clock signal can be varied to accommodate for the change in frequency.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: March 6, 2007
    Assignee: Intel Corporation
    Inventor: Moty Mehalel
  • Dynamic memory sizing for power reduction
    Publication number: 20070043965
    Abstract: Systems and methods of dynamic memory for power reduction are described with respect to a memory with a coupled sleep device. In one embodiment, the operating requirements can reflect amount of memory required to perform commensurate operations. Memory power management logic is used to coordinate memory requirements with operating requirements. The sleep device is able to enable or disable the memory based on the requirements to reduce power consumption.
    Type: Application
    Filed: August 22, 2005
    Publication date: February 22, 2007
    Inventors: Julius Mandelblat, Moty Mehalel, Avi Mendelson, Alon Naveh
  • Lowering voltage for cache memory operation
    Publication number: 20060161831
    Abstract: Setting a minimum operating voltage (Vcc min) of the cache to a voltage value at which the number of cells that fail in the cache is between approximately 0.1% and approximately 1% of the number of lines in the cache, while the remaining cells continue to function correctly at the voltage value chosen for Vcc min, and compensating for errors produced by memory cells in the cache that fail when operated at the voltage value chosen for Vcc min.
    Type: Application
    Filed: January 19, 2005
    Publication date: July 20, 2006
    Inventor: Moty Mehalel
  • Adaptive delay of timing control signals
    Publication number: 20050146368
    Abstract: Embodiments of the present invention relate to a circuit that varies the delay time of a clock signal in response to a frequency of the clock signal. The circuit may include a sensor and a delay circuit. The sensor may output a determination of the frequency of the clock signal. The delay time of the delay circuit may be responsive to the determination of a frequency of the clock signal. Accordingly, when the frequency of a clock signal varies, a delay of that clock signal can be varied to accommodate for the change in frequency.
    Type: Application
    Filed: February 28, 2005
    Publication date: July 7, 2005
    Inventor: Moty Mehalel
  • Adaptive delay of timing control signals
    Patent number: 6885230
    Abstract: Embodiments of the present invention relate to a circuit that varies the delay time of a clock signal in response to a frequency of the clock signal. The circuit may include a sensor and a delay circuit. The sensor may output a determination of the frequency of the clock signal. The delay time of the delay circuit may be responsive to the determination of a frequency of the clock signal. Accordingly, when the frequency of a clock signal varies, a delay of that clock signal can be varied to accommodate for the change in frequency.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: April 26, 2005
    Assignee: Intel Corporation
    Inventor: Moty Mehalel
  • Adaptive delay of timing control signals
    Publication number: 20040189368
    Abstract: Embodiments of the present invention relate to a circuit that varies the delay time of a clock signal in response to a frequency of the clock signal. The circuit may include a sensor and a delay circuit. The sensor may output a determination of the frequency of the clock signal. The delay time of the delay circuit may be responsive to the determination of a frequency of the clock signal. Accordingly, when the frequency of a clock signal varies, a delay of that clock signal can be varied to accommodate for the change in frequency.
    Type: Application
    Filed: March 31, 2003
    Publication date: September 30, 2004
    Applicant: Intel Corporation
    Inventor: Moty Mehalel
  • Integral modular cache for a processor
    Patent number: 6412038
    Abstract: An integral modular cache. One embodiment includes a processor portion and a cache memory portion. The cache memory portion includes an array portion having tag logic and a set portion. The array portion extends along substantially all of a first axis of the processor. Control logic is to receive a cache size indicator and is capable of operating the cache with the one set portion or with additional set portions.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: June 25, 2002
    Assignee: Intel Corporation
    Inventor: Moty Mehalel
  • Short write test mode for testing static memory cells
    Patent number: 6256241
    Abstract: A short write test circuit and mode. One disclosed apparatus includes a memory cell that is connected to a first bit line and a second bit line. The short write test circuit causes a short write having a programmable duration to stress the memory cell.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: July 3, 2001
    Assignee: Intel Corporation
    Inventor: Moty Mehalel
  • Cache memory utilizing pseudo static four transistor memory cell
    Patent number: 5475633
    Abstract: A four transistor memory cell having a pair of cross coupled transistors and a pair of pass gates is disclosed. The four transistor memory cell is refreshed by charge transfer between the bit lines the internal nodes during bit line precharge.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: December 12, 1995
    Assignee: Intel Corporation
    Inventor: Moty Mehalel