Abstract: A trench capacitor structure in which arsenic contamination is substantially reduced and/or essentially eliminated from diffusing into a semiconductor substrate along sidewalls of a trench opening having a high aspect ratio is provided. The present invention also provides a method of fabricating such a trench capacitor structure as well as a method for detecting the arsenic contamination during the drive-in annealing step. The detection of arsenic for product running through the manufacturing lines uses the effect of arsenic enhanced oxidation. That is, the high temperature oxidation anneal used to drive arsenic into the semiconductor substrate is monitored for thickness. For large levels of arsenic outdiffusion, the oxidation rate will increase resulting in a thicker oxide layer. If such an event is detected, the product that has been through the process steps to form the buried plate up to the drive-in anneal, can be reworked to reduce arsenic contamination.

Abstract: A trench capacitor structure in which arsenic contamination is substantially reduced and/or essentially eliminated from diffusing into a semiconductor substrate along sidewalls of a trench opening having a high aspect ratio is provided. The present invention also provides a method of fabricating such a trench capacitor structure as well as a method for detecting the arsenic contamination during the drive-in annealing step. The detection of arsenic for product running through the manufacturing lines uses the effect of arsenic enhanced oxidation. That is, the high temperature oxidation anneal used to drive arsenic into the semiconductor substrate is monitored for thickness. For large levels of arsenic outdiffusion, the oxidation rate will increase resulting in a thicker oxide layer. If such an event is detected, the product that has been through the process steps to form the buried plate up to the drive-in anneal, can be reworked to reduce arsenic contamination.

Abstract: A trench capacitor structure in which arsenic contamination is substantially reduced and/or essentially eliminated from diffusing into a semiconductor substrate along sidewalls of a trench opening having a high aspect ratio is provided. The present invention also provides a method of fabricating such a trench capacitor structure as well as a method for detecting the arsenic contamination during the drive-in annealing step. The detection of arsenic for product running through the manufacturing lines uses the effect of arsenic enhanced oxidation. That is, the high temperature oxidation anneal used to drive arsenic into the semiconductor substrate is monitored for thickness. For large levels of arsenic outdiffusion, the oxidation rate will increase resulting in a thicker oxide layer. If such an event is detected, the product that has been through the process steps to form the buried plate up to the drive-in anneal, can be reworked to reduce arsenic contamination.

Abstract: A bilayer dielectric structure for substantially reducing or eliminating metal contaminants formed during subsequent polysilicon deposition is provided. The bilayer dielectric structure includes an upper surface region that is rich in chlorine located atop a bottom surface region. The upper surface region that is rich in chlorine removes metal contaminates that are present atop the structure during subsequent formation of a polysilicon layer. A method of forming the bilayer structure is also provided.