Patents by Inventor Mu-Chieh Liu

Mu-Chieh Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Formation of prescribed pattern on wafer for use in SEM defect offset
    Patent number: 8208714
    Abstract: A prescribed pattern is formed at a plurality of known locations on a semiconductor wafer. The plurality of known locations are incorporated into a defect map that includes a location of at least one defect detected by an in-line inspection of the wafer. The defect map including the plurality of known locations and the location of the at least one defect is transmitted to a scanning electron microscope (SEM). The SEM uses the known locations to calculate a defect offset for use in imaging the at least one defect in the SEM.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: June 26, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mu-Chieh Liu, Hsiao Wen Chung, Jeng-Huei Yang
  • FORMATION OF PRESCRIBED PATTERN ON WAFER FOR USE IN SEM DEFECT OFFSET
    Publication number: 20100296722
    Abstract: A prescribed pattern is formed at a plurality of known locations on a semiconductor wafer. The plurality of known locations are incorporated into a defect map that includes a location of at least one defect detected by an in-line inspection of the wafer. The defect map including the plurality of known locations and the location of the at least one defect is transmitted to a scanning electron microscope (SEM). The SEM uses the known locations to calculate a defect offset for use in imaging the at least one defect in the SEM.
    Type: Application
    Filed: May 21, 2009
    Publication date: November 25, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Mu-Chieh LIU, Hsiao Wen CHUNG, Jeng-Huei Yang