Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.

Abstract: A carrier structure is provided with a plurality of package substrates connected via connecting sections, and a functional element and a groove are formed on the connecting section, such that the groove is located between the package substrate and the functional element. Therefore, when a cladding layer covering a chip is formed on the package substrate, the groove can accommodate a glue material overflowing from the cladding layer to prevent the glue material from contaminating the functional element.

Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.

Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.

Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.

Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.

Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.

Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.

Abstract: A method, a system and a computer program product for generating an animation are provided. In the method, an emotion change in a text is identified, and the emotion change contains one or more emotions. Images matching the emotion change are determined. And an animation file is generated based on the determined images.

Abstract: A plug-and-play solution deployment mechanism and infrastructure to automate deployment of network cluster devices is disclosed. The solution includes an agile hardware topology discovery mechanism to automatically map the hardware of the cluster devices. The solution includes an intelligent engine for recognition of BIOS configuration setting and BIOS configuration of the devices. The solution also includes a demand-driven Cloud architecture design engine to design and test a cloud architecture incorporating the cluster devices.

Abstract: A plug-and-play solution deployment mechanism and infrastructure to automate deployment of network cluster devices is disclosed. The solution includes an agile hardware topology discovery mechanism to automatically map the hardware of the cluster devices. The solution includes an intelligent engine for recognition of BIOS configuration setting and BIOS configuration of the devices. The solution also includes a demand-driven Cloud architecture design engine to design and test a cloud architecture incorporating the cluster devices.

Abstract: A method is provided and includes the following steps. A first wafer is coupled to a first support of a bonding tool and a second wafer is coupled to a second support of the bonding tool. The second wafer is bonded to the first wafer with the first wafer coupled to the first support. Whether a bubble is between the bonded first and second wafers in the bonding tool is detected.

Abstract: A system, a control method and an apparatus for chemical mechanical polishing (CMP) are introduced in the present application. The CMP apparatus may include a polishing pad, a first sensor, a polishing head and a condition. The polishing pad has a plurality of groves arranged randomly or in a specific pattern. The first sensor is configured to measure the pad profile of the polishing pad, where the pad profile includes the depth of each of the grooves on the polishing pad. The polishing head and the conditioner are operated according to at least one polishing condition, and the at least one polishing condition is tuned according to the pad profile.

Abstract: A method, a system and a computer program product for generating an animation are provided. In the method, an emotion change in a text is identified, and the emotion change contains one or more emotions. Images matching the emotion change are determined. And an animation file is generated based on the determined images.

Abstract: A system, a control method and an apparatus for chemical mechanical polishing (CMP) are introduced in the present application. The CMP apparatus may include a polishing pad, a first sensor, a polishing head and a condition. The polishing pad has a plurality of groves arranged randomly or in a specific pattern. The first sensor is configured to measure the pad profile of the polishing pad, where the pad profile includes the depth of each of the grooves on the polishing pad. The polishing head and the conditioner are operated according to at least one polishing condition, and the at least one polishing condition is tuned according to the pad profile.

Abstract: A method is provided and includes the following steps. A first wafer is coupled to a first support of a bonding tool and a second wafer is coupled to a second support of the bonding tool. The second wafer is bonded to the first wafer with the first wafer coupled to the first support. Whether a bubble is between the bonded first and second wafers in the bonding tool is detected.

Abstract: A satellite-based positioning method includes: obtaining predicted satellite data for at least one satellite vehicles (SVs) in a global navigation satellite system (GNSS); obtaining reference satellite data for the at least one SV; calculating satellite prediction error data for each of the at least one SV according to the predicted satellite data and the reference satellite data; and utilizing a processing unit to calculate a parameter for each of the at least one SV based on the satellite prediction error data. An associated satellite-based positioning apparatus is also provided.

Abstract: A plug-and-play solution deployment mechanism and infrastructure to automate deployment of network cluster devices is disclosed. The solution includes an agile hardware topology discovery mechanism to automatically map the hardware of the cluster devices. The solution includes an intelligent engine for recognition of BIOS configuration setting and BIOS configuration of the devices. The solution also includes a demand-driven Cloud architecture design engine to design and test a cloud architecture incorporating the cluster devices.

Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided. In the method for fabricating the semiconductor device, at first, a dielectric layer is provided. Then, trenches are formed in the dielectric layer. Thereafter, the trenches are filled with spacer material to form a spacer structure in the dielectric layer for defining pixel regions. Then, lens structures are formed on the pixel regions. Each of the lens structures includes a first curved lens layer, a second curved lens layer and a curved color filter layer. The curved color filter layer is disposed on the second curved lens layer or between the first curved lens layer and the second curved lens layer.