Patents by Inventor Mu-Jia Liu

Mu-Jia Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating semiconductor device including a patterned multi-layered dielectric film with an exposed edge
    Patent number: 9412851
    Abstract: A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 9, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Chun Chang, Ping-Chia Shih, Chi-Cheng Huang, Kuo-Lung Li, Kun-I Chou, Chung-Che Huang, Chia-Cheng Hsu, Mu-Jia Liu
  • METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    Publication number: 20150179748
    Abstract: A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Chun Chang, Ping-Chia Shih, Chi-Cheng Huang, Kuo-Lung Li, Kun-I Chou, Chung-Che Huang, Chia-Cheng Hsu, Mu-Jia Liu
  • Semiconductor structures and method for fabricating the same
    Patent number: 8877323
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate, a second substrate opposite to the first substrate, a plurality of spacers disposed between the first substrate and the second substrate, and an adhesive material bonded with the first substrate and the second substrate within the two adjacent spacers. The invention also provides a method for fabricating the semiconductor structure.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: November 4, 2014
    Assignee: Himax Technologies Limited
    Inventors: Tsung-Chieh Chang, Ching-Hung Ko, Mu-Jia Liu
  • Semiconductor Structures and Method for Fabricating the Same
    Publication number: 20120135201
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate, a second substrate opposite to the first substrate, a plurality of spacers disposed between the first substrate and the second substrate, and an adhesive material bonded with the first substrate and the second substrate within the two adjacent spacers. The invention also provides a method for fabricating the semiconductor structure.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Tsung-Chieh Chang, Ching-Hung Ko, Mu-Jia Liu