Abstract: A system-on-a-chip (SOC) board includes a first switch and a plurality of local system-on-a-chip (SOC) devices coupled to the first switch. Each local SOC device includes one or more scheduler for one or more carriers and one or more hardware queues for storing paging packets to be scheduled by the scheduler for wireless transmission. One of the local SOC devices is a transport SOC (TSOC) device that implements a call processing module that is configured to receive a paging packet, forward a copy of the paging packet for storage in a hardware queue associated with each scheduler in the TSOC device that has registered to receive paging packets, and provide a copy of the paging packet to the first switch in response to one or more of the schedulers in the other local SOC devices registering to receive paging packets.

Abstract: A first system-on-a-chip (SOC) device is configured to connect to a backplane interface that is connected to a second SOC device. The first SOC device includes one or more processors to encapsulate an uplink radio bearer packet received at the first SOC device in a first header to form a first encapsulated packet. The first header includes a first address of a destination that is connected to the second SOC device by a backhaul network. The processors are also configured to encapsulate the first encapsulated packet in a second header to form a second encapsulated packet. The second header includes a second address of the second SOC device. The first SOC device also includes a hardware acceleration engine configured to transmit the second encapsulated packet from the first device board over the backplane interface.

Abstract: A base station includes a plurality of system-on-a-chip (SOC) boards, which each include a plurality of SOC devices to support wireless communication on a plurality of carriers. One of the SOC devices is a transport SOC (TSOC) device that terminates a backhaul interface for receiving downlink radio bearer packets. Each of the SOC devices configures the TSOC device to route downlink radio bearer packets to a packet data convergence protocol (PDCP) module in the SOC device.

Abstract: A system-on-a-chip (SOC) board includes a first switch and a plurality of local system-on-a-chip (SOC) devices coupled to the first switch. Each local SOC device includes one or more scheduler for one or more carriers and one or more hardware queues for storing paging packets to be scheduled by the scheduler for wireless transmission. One of the local SOC devices is a transport SOC (TSOC) device that implements a call processing module that is configured to receive a paging packet, forward a copy of the paging packet for storage in a hardware queue associated with each scheduler in the TSOC device that has registered to receive paging packets, and provide a copy of the paging packet to the first switch in response to one or more of the schedulers in the other local SOC devices registering to receive paging packets.

Abstract: A first system-on-a-chip (SOC) device is configured to connect to a backplane interface that is connected to a second SOC device. The first SOC device includes one or more processors to encapsulate an uplink radio bearer packet received at the first SOC device in a first header to form a first encapsulated packet. The first header includes a first address of a destination that is connected to the second SOC device by a backhaul network. The processors are also configured to encapsulate the first encapsulated packet in a second header to form a second encapsulated packet. The second header includes a second address of the second SOC device. The first SOC device also includes a hardware acceleration engine configured to transmit the second encapsulated packet from the first device board over the backplane interface.

Abstract: A base station includes a plurality of system-on-a-chip (SOC) boards, which each include a plurality of SOC devices to support wireless communication on a plurality of carriers. One of the SOC devices is a transport SOC (TSOC) device that terminates a backhaul interface for receiving downlink radio bearer packets. Each of the SOC devices configures the TSOC device to route downlink radio bearer packets to a packet data convergence protocol (PDCP) module in the SOC device.

Abstract: A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a plurality of processor cores, wherein the multi-core processor is configured to disable non-essential interrupts arriving on a plurality of data plane cores and route the non-essential interrupts to a plurality of control plane cores. Optionally, the multi-core processor may be configured so that all non-real-time threads and processes are bound to processor cores that are dedicated for all control plane activities and processor cores that are dedicated for all data plane activities will not host or run any threads that are not directly needed for data path implementation or Layer 2 processing.

Abstract: A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a plurality of processor cores, wherein the multi-core processor is configured to disable non-essential interrupts arriving on a plurality of data plane cores and route the non-essential interrupts to a plurality of control plane cores. Optionally, the multi-core processor may be configured so that all non-real-time threads and processes are bound to processor cores that are dedicated for all control plane activities and processor cores that are dedicated for all data plane activities will not host or run any threads that are not directly needed for data path implementation or Layer 2 processing.

Abstract: A method and system that helps to ensure that any cell crash (i.e., an involuntarily action occurring as a result of a software bug or malfunction) is localized to a single cell on a single modem board that supports multi-cell configuration. In this regard, the control plane and the remaining cells that are configured on the modem board should remain operational. Further the operator should be able to choose to take corrective action (i.e., reboot, reconfigure, delete, or create) with regard to a cell on the modem board without impacting the operations of the other configured cells.

Abstract: A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a plurality of processor cores, wherein the multi-core processor is configured to disable non-essential interrupts arriving on a plurality of data plane cores and route the non-essential interrupts to a plurality of control plane cores. Optionally, the multi-core processor may be configured so that all non-real-time threads and processes are bound to processor cores that are dedicated for all control plane activities and processor cores that are dedicated for all data plane activities will not host or run any threads that are not directly needed for data path implementation or Layer 2 processing.

Abstract: A method and system that helps to ensure that any cell crash (i.e., an involuntarily action occurring as a result of a software bug or malfunction) is localized to a single cell on a single modem board that supports multi-cell configuration. In this regard, the control plane and the remaining cells that are configured on the modem board should remain operational. Further the operator should be able to choose to take corrective action (i.e., reboot, reconfigure, delete, or create) with regard to a cell on the modem board without impacting the operations of the other configured cells.