Patents by Inventor Mugurel Stancu

Mugurel Stancu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and structures of integrated MEMS-CMOS devices
    Patent number: 9950924
    Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: April 24, 2018
    Assignee: mCube, Inc.
    Inventors: Sudheer S. Sridharamurthy, Te-Hse Terrence Lee, Ali J. Rastegar, Mugurel Stancu, Xiao Charles Yang
  • Methods and Structures of Integrated MEMS-CMOS Devices
    Publication number: 20160176708
    Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
    Type: Application
    Filed: December 30, 2015
    Publication date: June 23, 2016
    Inventors: Sudheer S. Sridharamurthy, Te-Hse Terrence Lee, Ali J. Rastegar, Mugurel Stancu, Xiao Charles Yang
  • Methods and structures of integrated MEMS-CMOS devices
    Patent number: 9276080
    Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 1, 2016
    Assignee: mCube, Inc.
    Inventors: Sudheer S. Sridharamurthy, Te-Hse Terrence Lee, Ali J. Rastegar, Mugurel Stancu, Xiao Charles Yang
  • METHODS AND STRUCTURES OF INTEGRATED MEMS-CMOS DEVICES
    Publication number: 20130236988
    Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 12, 2013
    Applicant: MCube, Inc.
    Inventors: Sudheer S. Sridharamurthy, Te-Hse Terrence Lee, Ali J. Rastegar, Mugurel Stancu, Xiao Charles Yang