Patents by Inventor Muhammad Muhammat Sanusi

Muhammad Muhammat Sanusi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220005778
    Abstract: A method for fabricating a semiconductor device with a heterogeneous solder joint includes: providing a semiconductor die; providing a coupled element; and soldering the semiconductor die to the coupled element with a first solder joint. The first solder joint includes: a solder material including a first metal composition; and a coating including a second metal composition, different from the first metal composition, the coating at least partially covering the solder material. The second metal composition has a greater stiffness and/or a higher melting point than the first metal composition.
    Type: Application
    Filed: June 29, 2021
    Publication date: January 6, 2022
    Inventors: Swee Kah Lee, Sook Woon Chan, Fong Mei Lum, Joachim Mahler, Muhammad Muhammat Sanusi
  • Patent number: 10914018
    Abstract: A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 ?m to 10 ?m. A method of manufacturing a metal surface with such micropores also is described.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: February 9, 2021
    Assignee: Infineon Technologies AG
    Inventors: Norbert Pielmeier, Chin Yung Lai, Swee Kah Lee, Muhammad Muhammat Sanusi, Evelyn Napetschnig, Nurfarena Othman, Siew Ching Seah
  • Publication number: 20200343167
    Abstract: A semiconductor package includes a mold compound, a plurality of electrically conductive leads at least some of which transition from a first level within the mold compound to a second (different) level outside the mold compound, and a semiconductor die embedded in the mold compound and attached to the plurality of electrically conductive leads in a flip-chip configuration. One or more leads of the plurality of electrically conductive leads includes a first section terminating at a side face of the mold compound or protruding from the side face with a first end positioned outside a footprint of the mold compound and which terminates at the second level, and a second section embedded in the mold compound and having a second end which is positioned under the semiconductor die and exposed at a bottom side of the semiconductor package. Corresponding methods of manufacture are also described.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 29, 2020
    Inventors: Nurfarena Othman, Do Hyung Kim, Swee Kah Lee, Mohd Rasydan Hakam Mohamad Tahir, Muhammad Muhammat Sanusi, Ciprian Mircea Pavaluta
  • Publication number: 20200291538
    Abstract: A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 ?m to 10 ?m. A method of manufacturing a metal surface with such micropores also is described.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 17, 2020
    Inventors: Norbert Pielmeier, Chin Yung Lai, Swee Kah Lee, Muhammad Muhammat Sanusi, Evelyn Napetschnig, Nurfarena Othman, Siew Ching Seah
  • Publication number: 20200006267
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 10431560
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: October 1, 2019
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20180033752
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 9806043
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: October 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20170256509
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 7, 2017
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh