Abstract: An imaging device may include a first illumination port to output first light having a first illumination distribution at a target to illuminate the target, a second illumination port to output second light having a second illumination distribution at the target to illuminate the target, the second illumination distribution being substantially similar to the first illumination distribution at the target, the second illumination port being spaced apart from the first illumination port, the first and second illumination distributions being simultaneously provided to the target and overlapping at the target. The illumination from the first and second ports may be matched to a same aspect ratio and field of view coverage as the imaging field of view.

Abstract: An imaging device may include a first illumination port to output first light having a first illumination distribution at a target to illuminate the target, a second illumination port to output second light having a second illumination distribution at the target to illuminate the target, the second illumination distribution being substantially similar to the first illumination distribution at the target, the second illumination port being spaced apart from the first illumination port, the first and second illumination distributions being simultaneously provided to the target and overlapping at the target. The illumination from the first and second ports may be matched to a same aspect ratio and field of view coverage as the imaging field of view.

Abstract: An imaging device may include a first illumination port to output first light having a first illumination distribution at a target to illuminate the target, a second illumination port to output second light having a second illumination distribution at the target to illuminate the target, the second illumination distribution being substantially similar to the first illumination distribution at the target, the second illumination port being spaced apart from the first illumination port, the first and second illumination distributions being simultaneously provided to the target and overlapping at the target. The illumination from the first and second ports may be matched to a same aspect ratio and field of view coverage as the imaging field of view.

Abstract: A concrete or mortar composition including (i) a cementitious binder material that contains Portland cement and 1-50 wt % date palm ash relative to the total weight of the cementitious binder material, (ii) a coarse aggregate, (iii) a fine aggregate, and (iv) water, wherein the cementitious binder material is present at 200-500 kg per m3 of the concrete or mortar composition.

Abstract: A concrete or mortar composition including (i) a cementitious binder material that contains Portland cement and 1-50 wt % date palm ash relative to the total weight of the cementitious binder material, (ii) a coarse aggregate, (iii) a fine aggregate, and (iv) water, wherein the cementitious binder material is present at 200-500 kg per m3 of the concrete or mortar composition.

Abstract: An I/O (input/output) bus arbiter to be used in conjunction with a compatible CPU (processor) to effect burst mode data transfers in all I/O accesses that remove the need for DMA (Direct-Memory-Access) signals, Bus-request/Bus-grant signals, and bridges consequently removing the need for a bus system to connect peripherals such as the PCI (Peripheral-Connect-Interface). The I/O arbiter consists of an interrupt controller with circular buffers, FIFOs (First-In-First-Out) and port engines for directly attaching devices with proper interface buffers, together with a compatible CPU interrupt signals, and synchronous data transfers with only this one arbiter.

Abstract: A model and access method for devices to be homogenous irrespective whether they be character or block types. The access method is closely coupled between a host processor and the input/output (I/O) ports either through the data ports to the FIFOs (First-In-First-Out), or the control ports of the devices. Data transfers to the devices are effected through their data ports, while the control words in the form of bytecodes are sent through the control ports. The access method enables parallel processing within independent devices as they can execute device specific codes in parallel with the system software or kernel. The bytecodes are portable across hardware platforms since they serve as command words for configuration of devices and command instructions for the burst mode transfer of data between devices and a processor.

Abstract: An imaging device having an imaging field of view, the imaging device including at least one illumination port configured to output light for illuminating a target; an imaging sensor to detect light traveling along an optical path to the imaging sensor; and a first movable window positioned upstream of the sensor with respect to a direction of travel of light along the optical path, wherein the first movable window is configured to move into the optical path in a deployed position for modifying light received from the target.

Abstract: A processor or CPU architecture that implements many enabling technologies proven to enhance data through put supporting the synchronous burst data transfer. The Input-Output (I/O) is uniformly viewed and treated as an individual First-In-First-Out (FIFO) device. Pluralities of memory areas are implemented for user stack, kernel stack, interrupt stack and procedure call stack. Only one I/O arbiter is necessary for a CPU model that arbitrates between a plurality of FIFOs substituting data caches for on-chip implementation, thus eliminating traditional data transfer techniques using Direct-Memory-Access (DMA), bus control and lock signals leaving just the interrupt signals and the new synchronous signals for an easy and streamlined system design and CPU model. Supporting an interrupt-driven, FIFO-based I/O and synchronous burst data transfer the CPU employs a simple linear large register sets without bank switching.

Abstract: Closed cavity adjustable sensor mount systems and methods are disclosed. The sensor mount systems include a sealed, closed cavity enclosing a sensor and forming a closed cavity sensor assembly. The closed cavity sensor assembly may be tilted and/or translated relative to a platform in order to adjust the orientation of the sensor to align it with an imaging optical axis. Following alignment, the closed cavity sensor assembly may be permanently or reversibly fixed in place. The closed cavity adjustable sensor mount systems may be part of medical imaging systems such as endoscopic imaging systems and/or open field imaging systems.

Abstract: An imaging device may include a first illumination port to output first light having a first illumination distribution at a target to illuminate the target, a second illumination port to output second light having a second illumination distribution at the target to illuminate the target, the second illumination distribution being substantially similar to the first illumination distribution at the target, the second illumination port being spaced apart from the first illumination port, the first and second illumination distributions being simultaneously provided to the target and overlapping at the target. The illumination from the first and second ports may be matched to a same aspect ratio and field of view coverage as the imaging field of view.

Abstract: An I/O (input/output) bus arbiter to be used in conjunction with a compatible CPU (processor) to effect burst mode data transfers in all I/O accesses that remove the need for DMA (Direct-Memory-Access) signals, Bus-request/Bus-grant signals, and bridges consequently removing the need for a bus system to connect peripherals such as the PCI (Peripheral-Connect-Interface). The I/O arbiter consists of an interrupt controller with circular buffers, FIFOs (First-In-First-Out) and port engines for directly attaching devices with proper interface buffers, together with a compatible CPU interrupt signals, and synchronous data transfers with only this one arbiter.

Abstract: A processor or CPU architecture that implements many enabling technologies proven to enhance data through put supporting the synchronous burst data transfer. The Input-Output (I/O) is uniformly viewed and treated as an individual First-In-First-Out (FIFO) device. Pluralities of memory areas are implemented for user stack, kernel stack, interrupt stack and procedure call stack. Only one I/O arbiter is necessary for a CPU model that arbitrates between a plurality of FIFOs substituting data caches for on-chip implementation, thus eliminating traditional data transfer techniques using Direct-Memory-Access (DMA), bus control and lock signals leaving just the interrupt signals and the new synchronous signals for an easy and streamlined system design and CPU model. Supporting an interrupt-driven, FIFO-based I/O and synchronous burst data transfer the CPU employs a simple linear large register sets without bank switching.

Abstract: A model and access method for devices to be homogenous irrespective whether they be character or block types. The access method is closely coupled between a host processor and the input/output (I/O) ports either through the data ports to the FIFOs (First-In-First-Out), or the control ports of the devices. Data transfers to the devices are effected through their data ports, whilst the control words in the form of bytecodes are sent through the control ports. The access method enables parallel processing within independent devices as they can execute device specific codes in parallel with the system software or kernel. The bytecodes are portable across hardware platforms since they serve as command words for configuration of devices and command instructions for the burst mode transfer of data between devices and a processor.

Abstract: A modular, flexible 3D scanner is provided which integrates motion control, data acquisition, data processing and report generation functions in a system having a single user interface for all functions. Control software includes an interface and components to assist a user in creating motion control scripts that are used to move a part through various positions at which images are captured. Analysis software is called from the control software to process data into an accurate 3D rendering of the part, which is compared to a virtual model of the part as designed. A report is generated showing where the measured dimensions of the part vary from the as designed dimensions of the part. The disclosed 3D scanner can be used in conjunction with a CNC machine to provide on-machine inspection to reduce rework, labor and scrap.

Abstract: A synchronous reluctance motor for conveying media with large air gap for low speed operation with simple scalar control, which comprises a stator and a tapered reluctance rotor are reported.