Abstract: A read amplifier, comprising: a transistor having a first terminal and a second terminal, the second terminal being coupled to a sense node, the transistor being arranged to: (i) receive, on the second terminal, a data signal that is generated at least in part by a memory matrix, and (ii) output, on the sense node, an amplified data signal; and a feedback circuit arranged to generate, based at least in part on the data signal, a feedback signal that is applied at a gate of the transistor; and a pre-charge circuit that is configured to pre-charge the sense node to a predetermined value, such that, after the sense node is pre-charged, a voltage at the sense node settles at a value corresponding to the amplified data signal.

Abstract: A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.

Abstract: A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.

Abstract: A gaming unit having a light device controller operatively coupled a light device. The light device controller being adapted to couple to the gaming unit by a universal serial bus peripheral connection. The light device controller comprising a processor, a memory, and an input/output device. The gaming unit capable of transmitting the light display data to the light device controller via the universal serial bus peripheral connection.

Abstract: A gaming machine having a light device coupled to the gaming machine by a peripheral bus connection. The gaming machine capable of reading a pattern file, containing a light pattern display. The gaming machine further capable of sending the light display pattern to a light device controller via the peripheral bus connection. The light device controller capable of parsing the light display pattern, interpreting the pattern to be capable of generation on the light device, and causing the pattern to be generated on the light device.