Patents by Inventor Muhammed Umar FAROOQ

Muhammed Umar FAROOQ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11687343
    Abstract: A data processing apparatus and a method are disclosed.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 27, 2023
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, Chang Joo Lee, James David Dundas, Muhammed Umar Farooq
  • Patent number: 11379377
    Abstract: First and second-level caches are provided. Cache control circuitry performs a first-level cache lookup of the first-level cache based on a lookup address, to determine whether the first-level cache stores valid cached data corresponding to the lookup address. When lookup hint information associated with the lookup address is available, the cache control circuitry determines based on the lookup hint information whether to activate or deactivate a second-level cache lookup of the second-level cache. The lookup hint information is indicative of whether the second-level cache is predicted to store valid cached data associated with the lookup address. When the second-level cache lookup is activated, the second-level cache lookup of the second-level cache is performed based on the lookup address to determine whether the second-level cache stores valid cached data corresponding to the lookup address.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: July 5, 2022
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, James David Dundas, Chang Joo Lee, Muhammed Umar Farooq
  • Publication number: 20220107901
    Abstract: First and second-level caches are provided. Cache control circuitry performs a first-level cache lookup of the first-level cache based on a lookup address, to determine whether the first-level cache stores valid cached data corresponding to the lookup address. When lookup hint information associated with the lookup address is available, the cache control circuitry determines based on the lookup hint information whether to activate or deactivate a second-level cache lookup of the second-level cache. The lookup hint information is indicative of whether the second-level cache is predicted to store valid cached data associated with the lookup address. When the second-level cache lookup is activated, the second-level cache lookup of the second-level cache is performed based on the lookup address to determine whether the second-level cache stores valid cached data corresponding to the lookup address.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 7, 2022
    Inventors: Yasuo ISHII, James David DUNDAS, Chang Joo LEE, Muhammed Umar FAROOQ
  • Publication number: 20220100666
    Abstract: A data processing apparatus and a method are disclosed.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Inventors: Yasuo ISHII, Chang Joo LEE, James David DUNDAS, Muhammed Umar FAROOQ