Patents by Inventor Muhammed Zeyd Coban

Muhammed Zeyd Coban has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11811541
    Abstract: Aspects of the present disclosure provide techniques for using a radio access network (RAN) level negative acknowledgement (NAK) feedback to indicate at least one missing frame from an encoding device. The RAN level NAK feedback replaces or preempts a decoding device sending an end-to-end feedback to the encoding device using real-time transport protocol (RTP) that has a long latency and may cause freezes at the decoding device. For example, an encoding device may send to a network entity a request for a configuration that configures the encoding device to transmit media frames to the decoding device. The network entity may provide a NAK feedback indicating at least one missing frame. Having received the configuration in response to the request, the encoding device transmits media frames to the decoding device via the network entity, and monitors for NAK feedback from the network entity in accordance with the configuration.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: November 7, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Alberto Rico Alvarino, Muhammed Zeyd Coban, Umesh Phuyal
  • Publication number: 20230328276
    Abstract: A method for coding a block of video data using affine mode includes determining a refined affine model for the current block of video data from a linear regression process using a base motion vector field and a guidance motion vector field as inputs to the linear regression process. The method further includes determining affine merge candidates for the current block using the refined affine model, and coding the current block of video data using the affine merge candidates.
    Type: Application
    Filed: March 23, 2023
    Publication date: October 12, 2023
    Inventors: Yan Zhang, Han Huang, Vadim Seregin, Muhammed Zeyd Coban, Marta Karczewicz
  • Patent number: 11785205
    Abstract: A video decoder for decoding multi-layer video data can be configured to maintain a decoded picture buffer (DPB) for storing reference pictures for a plurality of layers, wherein the plurality of layers comprise at least a first layer and a second layer; prior to decoding a current picture of an access unit of the first layer, perform a picture output and removal process on the DPB, wherein to perform the picture output and removal process on the DPB, the one or more processors are further configured to remove from the DPB only decoded pictures that belong to the first layer; and after removing a last decoding unit of the current picture from a coded picture buffer (CPB), perform a picture bumping process across all layers of the DPB.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: October 10, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vadim Seregin, Adarsh Krishnan Ramasubramonian, Muhammed Zeyd Coban
  • Patent number: 11785259
    Abstract: As part of bypass decoding syntax elements for a set of coefficients in response to reaching a maximum number of regular coded bins, a video decoder is configured to receive a prefix value for a transform coefficient; decode the prefix value using Golomb-Rice coding; in response to a length of the prefix value being equal to a threshold value, receive a suffix value for the transform coefficient; decode the suffix value using exponential Golomb coding; and determine a level value for the transform coefficient based on the decoded prefix value and the decoded suffix value.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: October 10, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Muhammed Zeyd Coban, Marta Karczewicz
  • Publication number: 20230319269
    Abstract: A device for encoding video data includes a memory configured to store video data, and a video encoder implemented in circuitry and configured to encode a future picture of the video data having a first display order position, the future picture being included in an intra period (IP) of the video data, the IP comprising a plurality of groups of pictures (GOPs), and after encoding the future picture, encode a picture of an ordinal first GOP of the plurality of GOPs using the future picture as a reference picture, each picture of the ordinal first GOP having display order positions earlier than the first display order position. Encoding the future picture in this manner may result in encoding performance improvements with minimal increases in encoding and decoding complexity.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 5, 2023
    Inventors: Sungwon Lee, Wei-Jung Chien, Adarsh Krishnan Ramasubramonian, Muhammed Zeyd Coban, Jianle Chen, Yi-Wen Chen, Marta Karczewicz
  • Patent number: 11778215
    Abstract: In one example, a device for decoding video data includes one or more processors implemented in circuitry and configured to: determine that a value for a syntax element representing a number of profile-tier-level (PTL) data structures in a video parameter set (VPS) of a bitstream is equal to a total number of output layer sets (OLSs) specified for the VPS; in response to determining that the value for the syntax element representing the number of profile-tier-level data structures in the VPS is equal to the total number of OLSs specified for the VPS, infer values for OLS PTL index values, without explicitly decoding values for the OLS PTL index values; and decode video data of one or more OLSs using corresponding PTL data structures of the PTL data structures in the VPS according to the inferred values for the OLS PTL index values.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: October 3, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yong He, Vadim Seregin, Muhammed Zeyd Coban, Nan Hu, Marta Karczewicz
  • Publication number: 20230283769
    Abstract: A video coder is configured to determine a reference block of a reference picture for prediction of a current block of a current picture using motion information and to generate a set of reference samples for the current block of the current picture. To generate the set of reference samples, the video coder is configured to perform reference sample clipping on the reference block of the reference picture based on a size of the reference picture. The video coder is further configured to generate a prediction block for the current block of the current picture based on the set of reference samples.
    Type: Application
    Filed: February 17, 2023
    Publication date: September 7, 2023
    Inventors: Vadim SEREGIN, Yao-Jen CHANG, Muhammed Zeyd COBAN
  • Patent number: 11743503
    Abstract: Example techniques and devices are disclosed. An example device for coding video data includes memory configured to store the video data and one or more processors implemented in circuitry and coupled to the memory. The one or more processors are configured to determine whether an entry in a reference picture list for a current picture is equal to no reference picture. Based on the entry being equal to no reference picture, the one or more processors are configured to determine additional information associated with the entry. The one or more processors are configured to check a constraint for the entry based on the additional information and code the current picture in accordance with the constraint.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: August 29, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vadim Seregin, Yong He, Muhammed Zeyd Coban, Adarsh Krishnan Ramasubramonian
  • Patent number: 11736687
    Abstract: A device for encoding video data includes a memory configured to store video data, and a video encoder implemented in circuitry and configured to encode a future picture of the video data having a first display order position, the future picture being included in an intra period (IP) of the video data, the IP comprising a plurality of groups of pictures (GOPs), and after encoding the future picture, encode a picture of an ordinal first GOP of the plurality of GOPs using the future picture as a reference picture, each picture of the ordinal first GOP having display order positions earlier than the first display order position. Encoding the future picture in this manner may result in encoding performance improvements with minimal increases in encoding and decoding complexity.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: August 22, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Sungwon Lee, Wei-Jung Chien, Adarsh Krishnan Ramasubramonian, Muhammed Zeyd Coban, Jianle Chen, Yi-Wen Chen, Marta Karczewicz
  • Patent number: 11716488
    Abstract: An example device includes a memory and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine a value of a first syntax element indicative of a number of subpictures in a picture of video data. The one or more processors are configured to determine, for each subpicture among the subpictures in the picture, a value of a respective second syntax element indicative of an identification of a respective subpicture. The one or more processors are also configured to code the respective subpicture identified by the respective second syntax element.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: August 1, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yao-Jen Chang, Vadim Seregin, Muhammed Zeyd Coban, Marta Karczewicz
  • Patent number: 11706425
    Abstract: A video decoder may be configured to receive a block of video data, and determine a value of a multiple transform set index for the block of video data based on a presence of non-zero transform coefficients in the block of video data other than a DC coefficient. The video decoder may then apply a transform to the block of video data based on the determined value of the multiple transform set index.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: July 18, 2023
    Assignee: Qualcomm Incorporated
    Inventors: Hilmi Enes Egilmez, Vadim Seregin, Muhammed Zeyd Coban, Marta Karczewicz
  • Patent number: 11695960
    Abstract: A video decoder determines, based on a block size of a current block and a low-frequency non-separable transform (LFNST) syntax element, a zero-out pattern of normatively defined zero-coefficients. The LFNST syntax element is signaled at a transform unit (TU) level. Additionally, the video decoder determines transform coefficients of the current block. The transform coefficients of the current block include transform coefficients in an LFNST region of the current block and transform coefficients outside the LFNST region of the current block. As part of determining the transform coefficients of the current block, the video decoder applies an inverse LFNST to determine values of one or more transform coefficients in the LFNST region of the current block. The video decoder also determines that transform coefficients of the current block in a region of the current block defined by the zero-out pattern are equal to 0.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: July 4, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Alican Nalci, Hilmi Enes Egilmez, Vadim Seregin, Muhammed Zeyd Coban, Marta Karczewicz
  • Publication number: 20230199226
    Abstract: An example device includes memory and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to receive a first slice header syntax element for a slice of the video data and determine a first value for the first slice header syntax element, the first value being indicative of whether dependent quantization is enabled. The one or more processors are configured to receive a second slice header syntax element for the slice of the video data and determine a second value for the second slice header syntax element, the second value being indicative of whether sign data hiding is enabled. The one or more processors are configured to determine whether transform skip residual coding is disabled for the slice based on the first value and the second value and decode the slice based on the determinations.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Alican Nalci, Marta Karczewicz, Muhammed Zeyd Coban
  • Patent number: 11683528
    Abstract: Example techniques and devices for decoding video data are disclosed. An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to extract a current sub-picture from a bitstream of the video data and parse virtual boundary syntax elements indicative of virtual boundaries for a current picture, wherein the current sub-picture is associated with the current picture. The one or more processors are configured to update the virtual boundaries based at least in part on the virtual boundary syntax elements and decode the current sub-picture based on the updated virtual boundaries.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: June 20, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vadim Seregin, Yong He, Yao-Jen Chang, Muhammed Zeyd Coban
  • Publication number: 20230179805
    Abstract: Systems and techniques are described herein for processing video data. For instance, a process can include obtaining video data including a picture. The process can also include determining a width of a film grain synthesis block of the picture based on at least one of a width and a height of the picture. The process can further include determining a height of the film grain synthesis block of the picture is one. The process may also include determining a block size of the film grain synthesis block based on the determined width and height. The process may further include selecting a grain block based on the determined block size.
    Type: Application
    Filed: October 19, 2022
    Publication date: June 8, 2023
    Inventors: Yong HE, Muhammed Zeyd COBAN
  • Patent number: 11659201
    Abstract: Systems, methods, and computer-readable storage media for calculating scaling ratios are described. An example method can include obtaining a current picture of video data and one or more scaling windows associated with the current picture and/or a reference picture selected for use in coding the current picture; determining a first size of the current picture and/or a second size of the reference picture, the first size including a first height and a first width and the second size including a second height and a second width; based on the one or more scaling windows and the first size and/or the second size, determining one or more scaling ratios associated with the current picture and/or the reference picture.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 23, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vadim Seregin, Adarsh Krishnan Ramasubramonian, Muhammed Zeyd Coban
  • Patent number: 11659207
    Abstract: An example method includes decoding, from a coded video bitstream, a first syntax element that specifies a constraint for a second syntax element that specifies whether subpicture information is present in the coded video bitstream and whether more than one subpicture is allowed to be present in the coded video bitstream; and decoding, based on the constraint specified by the first syntax element, the second syntax element.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: May 23, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yong He, Yao-Jen Chang, Vadim Seregin, Muhammed Zeyd Coban
  • Patent number: 11638036
    Abstract: An example device includes memory and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to receive a first slice header syntax element for a slice of the video data and determine a first value for the first slice header syntax element, the first value being indicative of whether dependent quantization is enabled. The one or more processors are configured to receive a second slice header syntax element for the slice of the video data and determine a second value for the second slice header syntax element, the second value being indicative of whether sign data hiding is enabled. The one or more processors are configured to determine whether transform skip residual coding is disabled for the slice based on the first value and the second value and decode the slice based on the determinations.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 25, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Alican Nalci, Marta Karczewicz, Muhammed Zeyd Coban
  • Patent number: 11632540
    Abstract: A video encoder and video decoder may be configured to disable subpicture processing in situations where reference picture scaling is enabled. In another example, when reference picture scaling is enabled, a video encoder may determine a reference picture scaling ratio for the reference picture resampling process based on a width of a scaling window (PicOutputWidthL) of the current picture and a height of the scaling window (PicOutputHeightL) of the current picture. The values of PicOutputWidthL and PicOutputHeightL are constrained, respectively, relative to a width of a scaling window (refPicOutputWidthL) of the reference picture and a height of the scaling window (refPicOutputHeightL) of the reference picture.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: April 18, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yao-Jen Chang, Vadim Seregin, Muhammed Zeyd Coban
  • Publication number: 20230093017
    Abstract: An example device for requesting a reduced resolution for video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: decode a first sequence of pictures of a bitstream, the first sequence of pictures having a first resolution; in response to determining that the device is to enter a power saving mode, send a message requesting a reduced resolution relative to the first resolution for a second sequence of pictures, the second sequence of pictures being subsequent to the first sequence of pictures in coding order; and decode the second sequence of pictures of the video data of the bitstream, the second sequence of pictures having the reduced resolution. The reduced resolution may be reduced spatial resolution, reduced temporal resolution (frame rate), or both.
    Type: Application
    Filed: August 15, 2022
    Publication date: March 23, 2023
    Inventors: Yong He, Muhammed Zeyd Coban