Patents by Inventor Mujahid Islam

Mujahid Islam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080087542
    Abstract: A capacitance sensor comprises an asynchronous ring first in first out (FIFO) oscillator circuit having an electrode for receiving a sample for analysis. A sample placed into contact with the electrode causes a change in capacitance at the electrode which gives rise to a change in the oscillation frequency of the ring. This change in oscillation frequency can be used to identify the sample.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 17, 2008
    Applicants: SEIKO EPSON CORPORATION, CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED
    Inventors: Simon Moore, Mujahid Islam
  • Patent number: 7295459
    Abstract: An SRAM memory cell employing thin-film transistors is provided having a first transmission gate, a second transmission gate and a bi-stable flip-flop comprising a first and a second inverter disposed between the first and the second transmission gate. A third transmission gate is coupled between an output terminal of the second inverter and an input terminal of the first inverter.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: November 13, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Mujahid Islam
  • Publication number: 20060039176
    Abstract: An SRAM memory cell employing thin-film transistors is provided having a first transmission gate, a second transmission gate and a bi-stable flip-flop comprising a first and a second inverter disposed between the first and the second transmission gate. A third transmission gate is coupled between an output terminal of the second inverter and an input terminal of the first inverter.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 23, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Mujahid Islam
  • Patent number: 6954084
    Abstract: A large scale integrated (LSI) or a very large scale integrated (VLSI) logic circuit, such as a fully programmable gate array (FPGA), comprises a plurality of polysilicon thin film transistors TFTs. The circuit, which may include a delay circuit, is asynchronous and does not comprise a clock. Thus, operations to be performed by the TFTs need not be performed within a single clock period—rather the operation of each stage of TFTs in the circuit is dependent on receiving a signal either from an input to the circuit or from a preceding stage in the circuit. Problems with variations in the threshold voltage between the TFTs are therefore avoided.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: October 11, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Mujahid Islam
  • Publication number: 20050146383
    Abstract: A capacitance sensor comprises an asynchronous ring first in first out (FIFO) oscillator circuit having an electrode for receiving a sample for analysis. A sample placed into contact with the electrode causes a change in capacitance at the electrode which gives rise to a change in the oscillation frequency of the ring. This change in oscillation frequency can be used to identify the sample.
    Type: Application
    Filed: February 11, 2003
    Publication date: July 7, 2005
    Applicant: CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED
    Inventors: Simon Moore, Mujahid Islam
  • Publication number: 20030151426
    Abstract: A large scale integrated (LSI) or a very large scale integrated (VLSI) logic circuit. such as a fully progammable gate array (FPGA), comprises a plurality of polysilicon thin film transistors TFTs. The circuit, which may include a delay circuit, is asynchronous and does not comprise a clock. Thus, operations to be performed by the TFTs need not be performed within a single clock period—rather the operation of each stage of TFTs in the circuit is dependent on receiving a signal either from an input to the circuit or from a preceding stage in the circuit. Problems with variations in the threshold voltage between the TFTs are therefore avoided.
    Type: Application
    Filed: February 6, 2003
    Publication date: August 14, 2003
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Mujahid Islam