Patents by Inventor Mukul Aggarwal

Mukul Aggarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11822885
    Abstract: Systems and methods for contextual natural language censoring are disclosed. For example, configuration data indicating details associated with content provided by a client device and/or about the client device may be received and may be utilized to determine impermissible and permissible exceptions for a given client. One or more queries may be generated utilizing the impermissible and permissible exceptions, and when input data is received from the client device and/or in association with the client identifier, the queries may be utilized to evaluate the input data for impermissible and permissible exceptions. The results may be filtered based on user preferences, the input data may be censored, the input data may be prevented from being exposed to a user device, the application associated with the input data may be removed from availability, and/or a maturity setting may be changed for the application, for example.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: November 21, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Arunachalam Sundararaman, Mukul Aggarwal, Rajesh Ravindran Nandyaleth, Ankur Gupta, Dilip Sridhar
  • Patent number: 11182160
    Abstract: A method and circuit for a data processing system provide a hardware accelerator repeat control instruction (402A) which is executed with a hardware accelerator instruction (402B) to extract and latch repeat parameters from the hardware accelerator repeat control instruction, such as a repeat count value (RPT_CNT), a source address offset value (ADDR_INCR0), and a destination address offset value (ADDR_INCR1), and to generate a command to the hardware accelerator (205) to execute the hardware accelerator instruction a specified plurality of times based on instruction parameters from the hardware accelerator instruction by using the repeat count value to track how many times the hardware accelerator instruction is executed and by automatically generating, at each execution of the hardware accelerator instruction, additional source and destination addresses for the hardware accelerator from the repeat parameters until the hardware accelerator instruction has been executed the specified plurality of times by the
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: November 23, 2021
    Assignee: NXP USA, Inc.
    Inventors: Maik Brett, Christian Tuschen, Sidhartha Taneja, Tejbal Prasad, Saurabh Arora, Anurag Jain, Pranshu Agrawal, Mukul Aggarwal, Ajay Sharma