Patents by Inventor Mukund Srinivasan
Mukund Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948783Abstract: Apparatus and methods to process a substrate comprising a gas distribution assembly comprising a plasma process region with an array of individual plasma sources. A controller is connected to the array of individual plasma sources and the substrate support. The controller is configured monitor the position of the at least one substrate and provide or disable power to the individual plasma sources based on the position of the substrate relative to the individual plasma sources.Type: GrantFiled: November 15, 2017Date of Patent: April 2, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Hari Ponnekanti, Mukund Srinivasan
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Publication number: 20230245895Abstract: Exemplary semiconductor processing methods may include depositing a boron-containing material on the substrate. The boron-containing material may extend along sidewalls of the one or more features in the substrate. The methods may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a portion of the one or more features in the substrate. The contacting may oxidize the boron-containing material.Type: ApplicationFiled: February 1, 2022Publication date: August 3, 2023Applicant: Applied Materials, Inc.Inventors: Zhonghua Yao, Qian Fu, Aaron Eppler, Mukund Srinivasan
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Patent number: 11705335Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.Type: GrantFiled: April 20, 2022Date of Patent: July 18, 2023Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11545504Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: GrantFiled: April 12, 2021Date of Patent: January 3, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Patent number: 11430801Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: GrantFiled: April 12, 2021Date of Patent: August 30, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Publication number: 20220246432Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.Type: ApplicationFiled: April 20, 2022Publication date: August 4, 2022Applicant: Applied Materials, Inc.Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11328928Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.Type: GrantFiled: June 18, 2019Date of Patent: May 10, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11276569Abstract: Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO2. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of Si3N4. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.Type: GrantFiled: July 18, 2019Date of Patent: March 15, 2022Assignee: Applied Materials, Inc.Inventors: Yongjing Lin, Tza-Jing Gung, Masaki Ogata, Yusheng Zhou, Xinhai Han, Deenesh Padhi, Juan Carlos Rocha, Amit Kumar Bansal, Mukund Srinivasan
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Patent number: 11189635Abstract: Methods of manufacturing memory devices are provided. The methods decrease the thickness of the first layers and increase the thickness of the second layers. Semiconductor devices are described having a film stack comprising alternating nitride and second layers in a first portion of the device, the alternating nitride and second layers of the film stack having a nitride:oxide thickness ratio (Nf:Of); and a memory stack comprising alternating word line and second layers in a second portion of the device, the alternating word line and second layers of the memory stack having a word line:oxide thickness ratio (Wm:Om), wherein 0.1(Wm:Om)<Nf:Of<0.95(Wm:Om).Type: GrantFiled: March 30, 2020Date of Patent: November 30, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Chang Seok Kang, Tomohiko Kitajima, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11152248Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.Type: GrantFiled: May 26, 2020Date of Patent: October 19, 2021Assignee: Applied Materials, Inc.Inventors: Jingmei Liang, Yong Sun, Jinrui Guo, Praket P. Jha, Jung Chan Lee, Tza-Jing Gung, Mukund Srinivasan
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Publication number: 20210257375Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: ApplicationFiled: April 12, 2021Publication date: August 19, 2021Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Publication number: 20210233918Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: ApplicationFiled: April 12, 2021Publication date: July 29, 2021Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Patent number: 10998329Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: GrantFiled: July 22, 2019Date of Patent: May 4, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Patent number: 10924550Abstract: A distributed key-value storage system may include a master node. The key-value store may be distributed among first and second nodes. The master node may receive a publish request to publish one or more key-value pairs. Each key-value pair may be stored in a retransmit buffer and sent to all the first nodes using a communication protocol of a first kind that does not include a retransmit protocol mechanism. Some of the key-value pairs may be sent to one or more second node using a communication protocol of a second kind that includes a retransmit protocol mechanism.Type: GrantFiled: June 22, 2018Date of Patent: February 16, 2021Assignee: VMWARE, INC.Inventors: Yuehai Xu, Enning Xiang, Mukund Srinivasan, Jorge Guerra Delgado
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Publication number: 20200373310Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.Type: ApplicationFiled: July 22, 2019Publication date: November 26, 2020Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
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Publication number: 20200312874Abstract: Methods of manufacturing memory devices are provided. The methods decrease the thickness of the first layers and increase the thickness of the second layers. Semiconductor devices are described having a film stack comprising alternating nitride and second layers in a first portion of the device, the alternating nitride and second layers of the film stack having a nitride:oxide thickness ratio (Nf:Of); and a memory stack comprising alternating word line and second layers in a second portion of the device, the alternating word line and second layers of the memory stack having a word line:oxide thickness ratio (Wm:Om), wherein 0.1(Wm:Om)<Nf:Of<0.95(Wm:Om).Type: ApplicationFiled: March 30, 2020Publication date: October 1, 2020Applicant: Applied Materials, Inc.Inventors: Chang Seok Kang, Tomohiko Kitajima, Mukund Srinivasan, Sanjay Natarajan
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Publication number: 20200286773Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Inventors: Jingmei LIANG, Yong SUN, Jinrui GUO, Praket P. JHA, Jung Chan LEE, Tza-Jing GUNG, Mukund SRINIVASAN
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Publication number: 20200258119Abstract: A system and method for identifying and promoting product items, in which current personal information of a consumer is used to identify and promote additional products items for purchase that have been specifically selected for the consumer at completion of a current order based upon current personal information of the consumer. The recommended product items may then be ordered with minimum additional effort on the part of the consumer, using information from the completed order. This results in a high likelihood of the recommended product items being of interest to, and therefore being purchased by, the consumer.Type: ApplicationFiled: February 18, 2020Publication date: August 13, 2020Inventors: Jonathan R. Burr, Mukund Srinivasan
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Patent number: 10734265Abstract: A system for processing a substrate is provided including a first planar motor, a substrate carrier, a first processing chamber, and a first lift. The first planar motor includes a first arrangement of coils disposed along a first horizontal direction, a top surface parallel to the first horizontal direction, a first side, a second side. The substrate carrier has a substrate supporting surface parallel to the first horizontal direction. The first processing chamber has an opening to receive a substrate disposed on the substrate carrier. The first lift includes a second planar motor having a second arrangement of coils disposed along the first horizontal direction. A top surface top surface of the second planar motor is parallel to the first horizontal direction. The first lift is configured to move the top surface of the second planar motor between a first vertical location and a second vertical location.Type: GrantFiled: June 25, 2018Date of Patent: August 4, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Karthik Janakiraman, Hari K. Ponnekanti, Juan Carlos Rocha, Mukund Srinivasan
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Patent number: 10707116Abstract: Implementations disclosed herein relate to methods for forming and filling trenches in a substrate with a flowable dielectric material. In one implementation, the method includes subjecting a substrate having at least one trench to a deposition process to form a flowable layer over a bottom surface and sidewall surfaces of the trench in a bottom-up fashion until the flowable layer reaches a predetermined deposition thickness, subjecting the flowable layer to a first curing process, the first curing process being a UV curing process, subjecting the UV cured flowable layer to a second curing process, the second curing process being a plasma or plasma-assisted process, and performing sequentially and repeatedly the deposition process, the first curing process, and the second curing process until the plasma cured flowable layer fills the trench and reaches a predetermined height over a top surface of the trench.Type: GrantFiled: May 11, 2018Date of Patent: July 7, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Jingmei Liang, Yong Sun, Jinrui Guo, Praket P. Jha, Jung Chan Lee, Tza-Jing Gung, Mukund Srinivasan