Patents by Inventor Muneaki Kure
Muneaki Kure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10665533Abstract: A lead frame includes a conductive member, a plating layer, and an oxide film. The conductive member includes a rough surface. The plating layer is formed on the rough surface and configured to be connected to a semiconductor element. The oxide film covers the rough surface at least around the plating layer.Type: GrantFiled: November 2, 2018Date of Patent: May 26, 2020Assignee: Shinko Electric Industries, Co., Ltd.Inventors: Kesayuki Sonehara, Muneaki Kure, Yosuke Aruga
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Publication number: 20190157196Abstract: A lead frame includes a conductive member, a plating layer, and an oxide film. The conductive member includes a rough surface. The plating layer is formed on the rough surface and configured to be connected to a semiconductor element. The oxide film covers the rough surface at least around the plating layer.Type: ApplicationFiled: November 2, 2018Publication date: May 23, 2019Inventors: Kesayuki SONEHARA, Muneaki KURE, Yosuke ARUGA
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Patent number: 8581379Abstract: A lead frame for a resin-seal type semiconductor device, which includes a semiconductor element having an electrode, a bonding wire connected to the electrode of the semiconductor element, and a sealing resin covering and sealing the semiconductor element and the bonding wire. The lead frame includes a substrate frame, a four-layer plating, and a three-layer plating. The substrate frame include leads, a connection region, which is sealed by the sealing resin and connected to the bonding wire, and an exposed region, which is not sealed by the sealing resin. A four-layer plating is applied to a portion of the substrate frame that is to be connected to the bonding wire and sealed by the sealing resin. A three-layer plating is applied to an exposed region of the substrate frame that is exposed from the sealing resin.Type: GrantFiled: March 15, 2012Date of Patent: November 12, 2013Assignee: Shinko Electric Industries Co., Ltd.Inventors: Muneaki Kure, Takashi Yoshie, Masayuki Okushi
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Patent number: 8304872Abstract: A lead frame includes a lead frame body 21 having a die pad 24 to which a semiconductor chip 12 is bonded and a plurality of leads 25 arranged around the die pad 24 and made of Cu or an alloy containing Cu, and a metallic film formed on the lead frame body 21 and to connected to a metallic wire 15 connected to the electrode pad 36 of the semiconductor chip 12. The metallic film is an Ag-plated film 22 with nanoparticles 34 arranged in gaps 33 among Ag crystal grains 31.Type: GrantFiled: November 25, 2009Date of Patent: November 6, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Muneaki Kure, Akemi Nozaki
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Publication number: 20120248591Abstract: A lead frame for a resin-seal type semiconductor device, which includes a semiconductor element having an electrode, a bonding wire connected to the electrode of the semiconductor element, and a sealing resin covering and sealing the semiconductor element and the bonding wire. The lead frame includes a substrate frame, a four-layer plating, and a three-layer plating. The substrate frame include leads, a connection region, which is sealed by the sealing resin and connected to the bonding wire, and an exposed region, which is not sealed by the sealing resin. A four-layer plating is applied to a portion of the substrate frame that is to be connected to the bonding wire and sealed by the sealing resin. A three-layer plating is applied to an exposed region of the substrate frame that is exposed from the sealing resin.Type: ApplicationFiled: March 15, 2012Publication date: October 4, 2012Applicant: SHINKO ELECTRIC INDUSTRIES, CO., LTD.Inventors: Muneaki KURE, Takashi YOSHIE, Masayuki OKUSHI
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Publication number: 20100127369Abstract: A lead frame includes a lead frame body 21 having a die pad 24 to which a semiconductor chip 12 is bonded and a plurality of leads 25 arranged around the die pad 24 and made of Cu or an alloy containing Cu, and a metallic film formed on the lead frame body 21 and to connected to a metallic wire 15 connected to the electrode pad 36 of the semiconductor chip 12. The metallic film is an Ag-plated film 22 with nanoparticles 34 arranged in gaps 33 among Ag crystal grains 31.Type: ApplicationFiled: November 25, 2009Publication date: May 27, 2010Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Muneaki Kure, Akemi Nozaki
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Patent number: 7524702Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: GrantFiled: December 4, 2006Date of Patent: April 28, 2009Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Patent number: 7329944Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: GrantFiled: March 22, 2006Date of Patent: February 12, 2008Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
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Publication number: 20070272441Abstract: A highly reliable plated lead finishing structure for a semiconductor part using a Pd film or a Pd alloy film, instead of a traditional solder plating material, as a brazing metal, without causing a problem of short-circuits between terminals due to whiskers, is provided. In the plated lead finishing structure of the invention, when a plated film having a thickness of not larger than 0.3 ?m is formed using Pd or a Pd alloy (26), instead of a conventional solder-plating material as a brazing metal, on the surfaces of the external connection terminals (10, 12) of a semiconductor part using copper or a copper alloy-based material, the film is plated without interposing any underlying layer or any intermediate metal layer between the material and the Pd— or Pd alloy-plated layer. In some cases, Au or an Au alloy (28) is further plated and has a thickness of not larger than 0.1 ?m on the plated film.Type: ApplicationFiled: May 16, 2005Publication date: November 29, 2007Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Muneaki Kure
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Patent number: 7301226Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: GrantFiled: April 15, 2004Date of Patent: November 27, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Publication number: 20070085178Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: ApplicationFiled: December 4, 2006Publication date: April 19, 2007Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Publication number: 20060214272Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: ApplicationFiled: March 22, 2006Publication date: September 28, 2006Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
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Publication number: 20040262719Abstract: A lead frame, for semiconductor devices, provided with at least internal lead portions and external lead portions, the lead frame comprising: a base material of the lead frame consisting of copper or copper alloy; Pd or Pd alloy plated layers formed, on all surfaces or on at least the internal or external lead portions, through plated-under layers; and the plated under layers consisting of non-ferromagnetic metal in place of Ni plated layer. Ag, Sn, Au or Zn plated layer may be preferably used as the non-ferromagnetic metal. Otherwise, Sn—Ag or Sn—Zn alloy plated layer may also be preferably used as the non-ferromagnetic metal.Type: ApplicationFiled: June 28, 2004Publication date: December 30, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Muneaki Kure
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Publication number: 20040207056Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: ApplicationFiled: April 15, 2004Publication date: October 21, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure