Patents by Inventor Munehiro Tada

Munehiro Tada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12127485
    Abstract: A switching element that has reduced switching voltage and leakage current and that demonstrates high reliability and low power consumption is achieved as a result of comprising: a first insulation layer in which first wiring mainly consisting of copper is embedded in a first wiring groove that opens upward; a second insulation layer which is formed on an upper surface of the first insulation layer and the first wiring and has an opening that reaches the first insulation layer and the first wiring; a first electrode which is the portion of the first wiring that is exposed from the opening; an oxygen supply layer which is formed on an upper surface of the second insulation layer, generates oxygen plasma during etching to form the opening in the second insulation layer, and remains at least in the vicinity of the opening of the upper surface of the second insulation layer; an ion conducting layer which is formed on the upper surface of the first insulation layer and the first electrode that are exposed from the
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: October 22, 2024
    Assignee: NANOBRIDGE SEMICONDUCTOR, INC.
    Inventors: Naoki Banno, Munehiro Tada, Hideaki Numata, Koichiro Okamoto
  • Publication number: 20220123210
    Abstract: A switching element that has reduced switching voltage and leakage current and that demonstrates high reliability and low power consumption is achieved as a result of comprising: a first insulation layer in which first wiring mainly consisting of copper is embedded in a first wiring groove that opens upward; a second insulation layer which is formed on an upper surface of the first insulation layer and the first wiring and has an opening that reaches the first insulation layer and the first wiring; a first electrode which is the portion of the first wiring that is exposed from the opening; an oxygen supply layer which is formed on an upper surface of the second insulation layer, generates oxygen plasma during etching to form the opening in the second insulation layer, and remains at least in the vicinity of the opening of the upper surface of the second insulation layer; an ion conducting layer which is formed on the upper surface of the first insulation layer and the first electrode that are exposed from the
    Type: Application
    Filed: January 7, 2020
    Publication date: April 21, 2022
    Inventors: Naoki BANNO, Munehiro TADA, Hideaki NUMATA, Koichiro OKAMOTO
  • Publication number: 20210201996
    Abstract: Provided are a rewrite method for a variable resistance element that increases a rewrite count, and a non-volatile storage device using the variable resistance element. In the rewrite method for the variable resistance element, a variable resistance layer is disposed between a first electrode and a second electrode, and a write voltage is applied between the first electrode and the second electrode, thereby causing the resistance between the first electrode and the second electrode to reversibly change. After writing to the variable resistance element, the variable resistance element is read, the read current is measured, the measured read current is compared with a reference current, a condition of the writing is changed on the basis of the comparison results, and thereafter writing to the variable resistance element is performed again.
    Type: Application
    Filed: October 23, 2018
    Publication date: July 1, 2021
    Applicant: NEC Corporation
    Inventors: Toshitsugu SAKAMOTO, Naoki BANNO, Munehiro TADA, Yukihide TSUJI
  • Patent number: 10971547
    Abstract: This switch element includes a resistance change element, a first transistor, and a second transistor. The resistance change element includes: a metal deposition type resistance change film; a first electrode; and a second electrode. To the second electrode, a source or a drain of the second transistor is connected. The switch element has a first mode and a second mode, when a potential of the second electrode is made higher than that of the first electrode and the resistance change element is switched from the low resistance state to the high resistance state. The gate voltage is greater in the first mode than in the second mode, and a potential difference between the first and second electrodes is smaller in the first mode than in the second mode.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: April 6, 2021
    Assignee: NANOBRIDGE SEMICONDUCTOR, INC.
    Inventor: Munehiro Tada
  • Patent number: 10957739
    Abstract: Provided is a resistance variation element including a resistance variation film of a metal depositing type, a first electrode which contacts with a first surface of the resistance variation film in a predetermined first region and supplies metallic ions via the first region, and a second electrode laminated on a second surface of the resistance variation film. The first region includes a recessed region surrounded by a simple closed curve or a region surrounded by a plurality of simple closed curves. A line segment which passes through a point outside of the first region, ends of which exist on the simple closed curve, and each point of which in the vicinity of both the ends other than both the ends is outside of the first region, exists, and an edge of the first electrode is formed in a part of the simple closed curve including both the ends.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: March 23, 2021
    Assignee: NEC CORPORATION
    Inventor: Munehiro Tada
  • Publication number: 20210050517
    Abstract: A semiconductor device includes a first insulation layer, a second insulation layer disposed on the first insulation layer and having an opening on an upper surface of the second insulation layer, a first electrode embedded in the second insulation layer and having an end exposed at the opening, a variable-resistance layer disposed on the first electrode and the second insulation layer in at least one region inside and around the opening, and a second electrode disposed on the variable-resistance layer. The opening and the second electrode are formed in a shape stretched in at least one axial direction.
    Type: Application
    Filed: April 15, 2019
    Publication date: February 18, 2021
    Applicant: NEC Corporation
    Inventors: Naoki BANNO, Munehiro TADA
  • Patent number: 10923534
    Abstract: Provided is a rectifying element that prevents erroneous writing and an erroneous operation and that is substituted for a select transistor; a rewritable semiconductor device that uses a nonvolatile switch including the rectifying element and having excellent reliability, a small area, and low power consumption has a stacked structure of a first electrode 11, a first buffer layer 14, a rectifying layer 13, a second buffer layer 15, and a second electrode 12; and the rectifying layer 13 comprises a first silicon nitride layer 16 having a high nitrogen content (50 atm % or more) and second silicon nitride layers 17A and 17B having a lower nitrogen content than the first silicon nitride layer 16 (50 atm % or less), wherein the second silicon nitride layers 17A and 17B are in contact with the first and second buffer layers (14, 15), respectively, and the first silicon nitride layer 16 is sandwiched between the second silicon nitride layers 17A and 17B.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: February 16, 2021
    Assignee: NEC CORPORATION
    Inventors: Naoki Banno, Munehiro Tada, Noriyuki Iguchi
  • Patent number: 10797105
    Abstract: Provided are: a semiconductor device in which a non-volatile switch provided with a rectifying element and a non-volatile element provided with no rectifying element are formed in the same wiring; and a method for producing the semiconductor device. The semiconductor device includes a first switching element and a second switching element disposed in a signal path of a logic circuit. The first switching element includes a rectifying element and a variable resistance element. The second switching element does not include the rectifying element but includes a variable resistance element. The first switching element and the second switching element are formed in the same wiring layer.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: October 6, 2020
    Assignee: NEC CORPORATION
    Inventors: Naoki Banno, Munehiro Tada
  • Patent number: 10693467
    Abstract: A switch circuit includes: a plurality of four-terminal switches having variable-resistance elements and a rectifier element serially connected; an input line and an output line, at least one of which is multiply present, to which are connected terminals of two switches other than terminals at which the variable-resistance terminals are serially connected; and a control line to which are connected the terminals of the two switches other than the terminals at which the rectifier elements are serially connected, the control line, together with the input line and the output line, turning on and off in turn, by pair, the pair of variable-resistance elements connected to the input line and the pair of variable-resistance elements connected to the output line, among the variable-resistance elements of the plurality of four-terminal switches of the four-terminal switches connected to the input line or the output line.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: June 23, 2020
    Assignee: NEC CORPORATION
    Inventors: Naoki Banno, Munehiro Tada
  • Publication number: 20200127051
    Abstract: This switch element includes a resistance change element, a first transistor, and a second transistor. The resistance change element includes: a metal deposition type resistance change film; a first electrode; and a second electrode. To the second electrode, a source or a drain of the second transistor is connected. The switch element has a first mode and a second mode, when a potential of the second electrode is made higher than that of the first electrode and the resistance change element is switched from the low resistance state to the high resistance state. The gate voltage is greater in the first mode than in the second mode, and a potential difference between the first and second electrodes is smaller in the first mode than in the second mode.
    Type: Application
    Filed: July 3, 2018
    Publication date: April 23, 2020
    Applicant: NEC Corporation
    Inventor: Munehiro TADA
  • Patent number: 10615339
    Abstract: To stabilize programming operation and to reduce leakage current. A variable resistance element according to the present invention is provided with: an interlayer insulating film; a first electrode that is formed within the interlayer insulating film and comprises an active electrode, the side surface and the bottom surface of which are covered by a barrier metal; a variable resistance film that is formed on the upper surface of the first electrode; a second electrode that is formed on the variable resistance film; and an insulating film spacer that is formed between the variable resistance film and the barrier metal which covers the side surface of the first electrode. In this connection, the variable resistance film and the barrier metal which covers the side surface of the first electrode are in contact with the insulating film spacer, respectively.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: April 7, 2020
    Assignee: NEC CORPORATION
    Inventor: Munehiro Tada
  • Publication number: 20200106443
    Abstract: A switch circuit includes: a plurality of four-terminal switches having variable-resistance elements and a rectifier element serially connected; an input line and an output line, at least one of which is multiply present, to which are connected terminals of two switches other than terminals at which the variable-resistance terminals are serially connected; and a control line to which are connected the terminals of the two switches other than the terminals at which the rectifier elements are serially connected, the control line, together with the input line and the output line, turning on and off in turn, by pair, the pair of variable-resistance elements connected to the input line and the pair of variable-resistance elements connected to the output line, among the variable-resistance elements of the plurality of four-terminal switches of the four-terminal switches connected to the input line or the output line.
    Type: Application
    Filed: April 5, 2018
    Publication date: April 2, 2020
    Applicant: NEC Corporation
    Inventors: Naoki BANNO, Munehiro TADA
  • Publication number: 20200020743
    Abstract: Provided is a resistance variation element including a resistance variation film of a metal depositing type, a first electrode which contacts with a first surface of the resistance variation film in a predetermined first region and supplies metallic ions via the first region, and a second electrode laminated on a second surface of the resistance variation film. The first region includes a recessed region surrounded by a simple closed curve or a region surrounded by a plurality of simple closed curves. A line segment which passes through a point outside of the first region, ends of which exist on the simple closed curve, and each point of which in the vicinity of both the ends other than both the ends is outside of the first region, exists, and an edge of the first electrode is formed in a part of the simple closed curve including both the ends.
    Type: Application
    Filed: December 18, 2017
    Publication date: January 16, 2020
    Applicant: NEC Corporation
    Inventor: Munehiro TADA
  • Patent number: 10490743
    Abstract: A crossbar switch comprising: a first interconnect, a second interconnect, and a resistance change element. The resistance change element includes: a first electrode connected to the first interconnect and a second electrode connected to the second interconnect which are embedded in a first insulating film on a substrate having a transistor; a second insulating film covering the first insulating film and the first and second electrodes; first and second opening portions exposing parts of an upper surface including end portions of the first and second electrodes from the second insulating film with translational symmetry; first and second resistance change films covering the first and second opening portions and connecting to the first and second electrodes at the opening portions; third and fourth electrodes connecting to the first and second resistance change films; a fifth electrode connecting to the third and fourth electrodes and to a diffusion layer of the transistor.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: November 26, 2019
    Assignee: NEC CORPORATION
    Inventors: Toshitsugu Sakamoto, Munehiro Tada
  • Patent number: 10424617
    Abstract: A crossbar switch includes a plurality of first wires extending in a first direction and second wires extending in a second direction. The switch includes third wires extending in a third direction and fourth wires extending in a fourth direction. The switch includes switch cells connected to the first and second wires. The first wires are skewed relative to the second and fourth wires, while the third wires are skewed relative to the second and fourth wires. The switch cells are connected to the third and fourth wires, and the third wires are also connected to the switch cells connected to the first wires adjacent to the respective first wires, or alternatively the fourth wires are also connected to the switch cells connected to the second wires adjacent to the respective second wires.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: September 24, 2019
    Assignee: NEC CORPORATION
    Inventors: Yukihide Tsuji, Xu Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada
  • Patent number: 10396798
    Abstract: A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: August 27, 2019
    Assignee: NEC CORPORATION
    Inventors: Xu Bai, Toshitsugu Sakamoto, Munehiro Tada, Yukihide Tsuji, Ayuka Tada, Makoto Miyamura, Ryusuke Nebashi
  • Patent number: 10340451
    Abstract: In switching elements each using a two-terminal-type variable resistance element, improper writing or any improper operation is often caused and the reliability of the switching elements cannot be improved easily. A switching element according to the present invention is equipped with a first variable resistance element equipped with a first input/output terminal and a first connection terminal, a second variable resistance element equipped with a second input/output terminal and a second connection terminal, and a rectifying element equipped with a control terminal and a third connection terminal, wherein the first connection terminal, the second connection terminal and the third connection terminal are connected to one another.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: July 2, 2019
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Naoki Banno, Koichiro Okamoto
  • Patent number: 10340452
    Abstract: A variable resistance element according to the present invention comprises a configuration in which an ion conduction layer is arranged between an upper electrode and a lower electrode, wherein a recess part is formed on a surface of the lower electrode of the variable resistance element, and the ion conduction layer is formed in contact with at least the recess part on a surface of the lower electrode.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 2, 2019
    Assignee: NEC CORPORATION
    Inventors: Naoki Banno, Munehiro Tada
  • Publication number: 20190189690
    Abstract: Provided are: a semiconductor device in which a non-volatile switch provided with a rectifying element and a non-volatile element provided with no rectifying element are formed in the same wiring; and a method for producing the semiconductor device. The semiconductor device includes a first switching element and a second switching element disposed in a signal path of a logic circuit. The first switching element includes a rectifying element and a variable resistance element. The second switching element does not include the rectifying element but includes a variable resistance element. The first switching element and the second switching element are formed in the same wiring layer.
    Type: Application
    Filed: June 28, 2017
    Publication date: June 20, 2019
    Applicant: NEC Corporation
    Inventors: Naoki BANNO, Munehiro TADA
  • Publication number: 20190181182
    Abstract: Provided is a rectifying element that prevents erroneous writing and an erroneous operation and that is substituted for a select transistor; a rewritable semiconductor device that uses a nonvolatile switch including the rectifying element and having excellent reliability, a small area, and low power consumption has a stacked structure of a first electrode 11, a first buffer layer 14, a rectifying layer 13, a second buffer layer 15, and a second electrode 12; and the rectifying layer 13 comprises a first silicon nitride layer 16 having a high nitrogen content (50 atm % or more) and second silicon nitride layers 17 having a lower nitrogen content than the first silicon nitride layer 16 (50 atm % or less), wherein the second silicon nitride layers 17 are in contact with the first and second buffer layers (14, 15), respectively, and the first silicon nitride layer 16 is sandwiched between the second silicon nitride layers 17.
    Type: Application
    Filed: July 24, 2017
    Publication date: June 13, 2019
    Applicant: NEC Corporation
    Inventors: Naoki BANNO, Munehiro TADA, Noriyuki IGUCHI