Patents by Inventor Munehiro Yamashita
Munehiro Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12160855Abstract: A band sharing communication system in which there are an N-ary system and an N+1-ary system in descending order of priority of communication, the systems share frequency bands and allocation of a requested band of a terminal station of each system is performed, includes: occupied band setting means for setting an N-ary occupied band and an N+1-ary occupied band adjacent to the N-ary occupied band; band allocation means for allocating a vacant band of the N-ary occupied band with respect to a requested band of an N-ary terminal station and allocating a vacant band of the N+1-ary occupied band with respect to a requested band of an N+1-ary terminal station; and band transferring means for, when there is no vacant band in the N-ary occupied band with respect to the requested band of the N-ary terminal station, if a vacant band equivalent to the requested band is present in the N+1-ary occupied band such that the vacant band is adjacent to the N-ary occupied band, transferring the vacant band from the N+1-ary ocType: GrantFiled: July 24, 2019Date of Patent: December 3, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Daisuke Goto, Fumihiro Yamashita, Munehiro Matsui, Hiroki Shibayama, Yutaka Imaizumi, Koichi Harada, Izumi Urata, Masaki Shima
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Patent number: 10175284Abstract: In a circuit board testing apparatus for performing a four-terminal measurement method on a wiring pattern formed of a plurality of wires on a circuit board, a control part connects in series contact probes to be connected to upstream-side voltage detection terminals or downstream-side voltage detection terminals, via connection terminals, allows a power supply part to apply power between the test points with which the contact probes connected in series are in contact, allows a voltage detection part to detect a voltage between the test points, and makes a determination as to conductive contact states of the contact probes with the test points, based on the detected voltage.Type: GrantFiled: October 7, 2015Date of Patent: January 8, 2019Assignee: NIDEC-READ CORPORATIONInventor: Munehiro Yamashita
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Patent number: 9874594Abstract: A circuit board inspecting apparatus is disclosed for inspecting a circuit board having wiring patterns separated from each other and forming a plurality of wiring pattern pairs. The apparatus includes a low-voltage inspection part to apply a first low-potential difference below a threshold voltage between wiring patterns in a first of the plurality of wiring pattern pairs, and to detect a first current flowing therebetween. A resistance measurement part is provided to measure a first resistance value between the wiring patterns of the first wiring pattern pair upon detection of the first current and a high-voltage inspection part is configured to selectively apply, based on the first resistance value, a high-potential difference above said threshold voltage, between the wiring patterns in a second of said plurality of wiring pattern pairs.Type: GrantFiled: June 1, 2015Date of Patent: January 23, 2018Assignee: NIDEC-READ CORPORATIONInventor: Munehiro Yamashita
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Patent number: 9678134Abstract: A method for maintaining a contact of a connection jig for connecting between a target object to be subjected to an electrical test and a testing apparatus configured to conduct the electrical test on the target object includes: detecting a change in voltage upon supply of power for the electrical test to a test point on the target object through the contact; and issuing maintenance information indicating the contact is abnormal, upon detection of a portion where the voltage does not successively rise.Type: GrantFiled: October 30, 2014Date of Patent: June 13, 2017Assignee: Nidec-Read CorporationInventor: Munehiro Yamashita
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Patent number: 9606162Abstract: An insulation test apparatus and method for a circuit board having a plurality of wiring patterns formed thereon includes: selection means for selecting wiring patterns to be tested, power supply means for sending a predetermined electrical output between a first object to be measured and a target object to be measured; measurement means for measuring an electrical signal between the first object to be measured and the target object to be measured; and calculation means for calculating the resistance of an insulation failure portion between the first object to be measured and the target object to be measured.Type: GrantFiled: May 8, 2013Date of Patent: March 28, 2017Assignee: Nidec-Read CorporationInventor: Munehiro Yamashita
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Publication number: 20160103172Abstract: In a circuit board testing apparatus for performing a four-terminal measurement method on a wiring pattern formed of a plurality of wires on a circuit board, a control part connects in series contact probes to be connected to upstream-side voltage detection terminals or downstream-side voltage detection terminals, via connection terminals, allows a power supply part to apply power between the test points with which the contact probes connected in series are in contact, allows a voltage detection part to detect a voltage between the test points, and makes a determination as to conductive contact states of the contact probes with the test points, based on the detected voltage.Type: ApplicationFiled: October 7, 2015Publication date: April 14, 2016Inventor: Munehiro Yamashita
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Publication number: 20150346268Abstract: A circuit board inspecting apparatus is disclosed for inspecting a circuit board having wiring patterns separated from each other and forming a plurality of wiring pattern pairs. The apparatus includes a low-voltage inspection part to apply a first low-potential difference below a threshold voltage between wiring patterns in a first of the plurality of wiring pattern pairs, and to detect a first current flowing therebetween. A resistance measurement part is provided to measure a first resistance value between the wiring patterns of the first wiring pattern pair upon detection of the first current and a high-voltage inspection part is configured to selectively apply, based on the first resistance value, a high-potential difference above said threshold voltage, between the wiring patterns in a second of said plurality of wiring pattern pairs.Type: ApplicationFiled: June 1, 2015Publication date: December 3, 2015Inventor: Munehiro Yamashita
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Publication number: 20150115974Abstract: A method for maintaining a contact of a connection jig for connecting between a target object to be subjected to an electrical test and a testing apparatus configured to conduct the electrical test on the target object includes: detecting a change in voltage upon supply of power for the electrical test to a test point on the target object through the contact; and issuing maintenance information indicating the contact is abnormal, upon detection of a portion where the voltage does not successively rise.Type: ApplicationFiled: October 30, 2014Publication date: April 30, 2015Applicant: NIDEC-READ CORPORATIONInventor: Munehiro Yamashita
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Publication number: 20150084643Abstract: An insulation test apparatus and method for a circuit board having a plurality of wiring patterns formed thereon includes: selection means for selecting wiring patterns to be tested, power supply means for sending a predetermined electrical output between a first object to be measured and a target object to be measured; measurement means for measuring an electrical signal between the first object to be measured and the target object to be measured; and calculation means for calculating the resistance of an insulation failure portion between the first object to be measured and the target object to be measured.Type: ApplicationFiled: May 8, 2013Publication date: March 26, 2015Applicant: NIDEC-READ CORPORATIONInventor: Munehiro Yamashita
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Publication number: 20140354317Abstract: A circuit board inspection apparatus configured to perform electrical inspection of wiring patterns formed on a circuit board with a built-in electronic component is provided with a plurality of contactors, a switching circuit, and a controller. The controlling device applies voltage by using a power supply between a contactor and a contactor in a state a switch of the switching circuit is set to be ON and inspects an insulating state between two wiring patterns corresponding to two inspection points on the circuit board. At this time, if forward bias is applied to and forward current flows in diodes inserted between the contactors outside the circuit board, a potential difference between the contactors becomes equal to a potential difference between the diodes and is limited to a relatively small value.Type: ApplicationFiled: June 3, 2014Publication date: December 4, 2014Applicant: NIDEC-READ CORPORATIONInventor: Munehiro Yamashita
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Patent number: 6462556Abstract: A probe is made to contact one end of the test wiring of a circuit board 32, with a head 52 electrostatically coupled to the other end of said wiring. A pulse-like DC voltage is supplied from a signal source 46, and, simultaneously with a switch section SWp turning on, the maximum voltage is applied to the test wiring. If a detection signal is below a specified value, then a computer 44 will read it as “open” or “shorting”. Further, a tip 52a of the head 52 is associated with the circuit board 32 only through an insulating sheet 33, so that the tip 52a is kept away from each pad of a pad section 38 on the board at a fixed distance (equivalent to the thickness of insulating sheet 33). Thus, continuity testing may be performed in a non-contact manner by moving head 52 only in X and Y directions without movement in the Z-direction.Type: GrantFiled: March 30, 2001Date of Patent: October 8, 2002Assignee: Nidec-Read CorporationInventors: Munehiro Yamashita, Michio Kaida
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Patent number: 6459272Abstract: A magnetic field applying portion is positioned above a magnetic field applied region, and applies a magnetic field to the magnetic field applied region. Among probes which are abutted against ball grids of wirings, two probes are selectively connected electrically to a current detector section whereby a closed circuit is formed. This causes the closed circuit to carry an induced current as the magnetic flux through the magnetic field the magnetic field applied region changes with time. A current detector of the current detector section detects the value of the induced current, and whether there is a short-circuit is judged based on the detected current value.Type: GrantFiled: May 22, 2000Date of Patent: October 1, 2002Assignee: Nidec-Read CorporationInventor: Munehiro Yamashita
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Patent number: 6316949Abstract: A testing apparatus and method for testing conductivity of electric pathways formed on a substrate, each pathway including a first wiring and a second wiring partially overlapping each other. The apparatus includes a first electric signal applier for applying a first electric signal having an electric parameter changing with time to an input portion of the first wiring, a first electrode facing a first portion of the second wiring, a second electrode facing a second portion of the second wiring, a second electric signal applier for applying to the second a electrode a second electric signal changing its electric parameter in the phase reverse to that of the first electric signal, and a monitor for monitoring the signal transmitted to the first electrode through its capacitive coupling.Type: GrantFiled: January 18, 2000Date of Patent: November 13, 2001Assignee: Nidec-Read CorporationInventor: Munehiro Yamashita
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Publication number: 20010013783Abstract: A probe is made to contact one end of the test wiring of a circuit board 32, with a head 52 electrostatically coupled to the other end of said wiring. A pulse-like DC voltage is supplied from a signal source 46, and, simultaneously with a switch section SWp turning on, the maximum voltage is applied to the test wiring. If a detection signal is below a specified value, then a computer 44 will read it as “open” or “shorting”. Further, a tip 52a of the head 52 is associated with the circuit board 32 only through an insulating sheet 33, so that the tip 52a is kept away from each pad of a pad section 38 on the board at a fixed distance (equivalent to the thickness of insulating sheet 33). Thus, continuity testing may be performed in a non-contact manner by moving head 52 only in X and Y directions without movement in the Z-direction.Type: ApplicationFiled: March 30, 2001Publication date: August 16, 2001Inventors: Munehiro Yamashita, Michio Kaida
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Patent number: 5969530Abstract: An inexpensive and reliable circuit board inspection apparatus and method requires only a short inspection time and is applicable to a densely wired circuit board. A constant voltage E is applied to a switch section SW1 from a signal source 46. A computer 44 turns on a switch section SW2 and then turns the switch section SW1 on. An equivalent circuit is then closed to cause a current (i) to flow therethrough, thereby generating a voltage Vx that is input to an amplifier 74. After the voltage Vx has been amplified by the amplifier 74, its maximum value is detected and held by a peak hold circuit 76. Based on the maximum value, the computer 44 determines the continuity of a printed pattern on a circuit board 32. The voltage Vx input to the amplifier 74 exhibits the maximum value nearly simultaneously with the activation of the switch section SW1. Thus, detection of the maximum value and continuity of the printed pattern can be determined in a very short time.Type: GrantFiled: February 27, 1998Date of Patent: October 19, 1999Assignee: Nidec-Read CorporationInventor: Munehiro Yamashita