Patents by Inventor Munenori Maeda
Munenori Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240037025Abstract: An arithmetic processing apparatus includes: a memory; and a processor coupled to the memory and configured to: determine whether a critical section is being executed in inter-thread synchronization using read-copy-update, and when determining that the critical section is being executed, perform memory freeing processing or memory reallocation processing, which is executed from a scheduler, by speculative execution.Type: ApplicationFiled: March 29, 2023Publication date: February 1, 2024Applicant: Fujitsu LimitedInventor: Munenori MAEDA
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Patent number: 11868165Abstract: A non-transitory computer-readable recording medium stores a control program for each of control circuits in an information processing device constituted by a plurality of the control circuits and for causing a computer to execute a process including: when synchronization of power consumption between the respective control circuits is detected, computing delay time of an own control circuit such that the control circuits have the delay time different from each other; disclosing data of the power consumption at a past time point with respect to the delay time, to other control circuits as the data of the current power consumption; and performing load balancing by using the data of the power consumption disclosed to the other control circuits and the data of the power consumption disclosed by the other control circuits.Type: GrantFiled: July 27, 2022Date of Patent: January 9, 2024Assignee: FUJITSU LIMITEDInventor: Munenori Maeda
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Patent number: 11640246Abstract: An information processing device includes: a request queue that stores a request for IO processing; a response queue that stores a response that makes notification of completion of the IO processing; an IO device that obtains the request from the request queue, executes the IO processing instructed by the obtained request, and stores the response in the response queue after the completion of the IO processing; a first processing unit that writes a request to the request queue after saving context that is information that indicates an operation state of the first processing unit; and a second processing unit that polls the response queue, detects storage of the response in the response queue, obtains the response from the response queue, and notifies the first processing unit of the completion of the IO processing.Type: GrantFiled: September 21, 2021Date of Patent: May 2, 2023Assignee: FUJITSU LIMITEDInventor: Munenori Maeda
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Publication number: 20220385726Abstract: An information processing apparatus including: a memory; and a processor coupled to the memory, the processor being configured to: in a network coupling a plurality of storage nodes, at least one proxy, and at least one client; collect information of accesses executed most by the at least one client via the at least one proxy on a path of each access; based on the information of accesses, calculate network distances between the plurality of storage nodes and the at least one proxy; and based on the network distances, determine a leader to be one of the plurality of storage nodes that is close to one of the at least one proxy accessed most frequently.Type: ApplicationFiled: February 4, 2022Publication date: December 1, 2022Applicant: FUJITSU LIMITEDInventor: Munenori MAEDA
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Patent number: 11405277Abstract: An information processing device, includes a memory; and a processor coupled to the memory and configured to: store, in the memory, a confirmation program for performing communication confirmation of a network, transmit the confirmation program to a server in the network, collect an execution result of the communication confirmation transmitted from the server by causing the server to execute the communication confirmation, and perform correctness determination of the execution result.Type: GrantFiled: December 3, 2020Date of Patent: August 2, 2022Assignee: FUJITSU LIMITEDInventors: Kazumi Abe, Munenori Maeda
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Publication number: 20220221991Abstract: An information processing device includes: a request queue that stores a request for IO processing; a response queue that stores a response that makes notification of completion of the IO processing; an IO device that obtains the request from the request queue, executes the IO processing instructed by the obtained request, and stores the response in the response queue after the completion of the IO processing; a first processing unit that writes a request to the request queue after saving context that is information that indicates an operation state of the first processing unit; and a second processing unit that polls the response queue, detects storage of the response in the response queue, obtains the response from the response queue, and notifies the first processing unit of the completion of the IO processing.Type: ApplicationFiled: September 21, 2021Publication date: July 14, 2022Applicant: FUJITSU LIMITEDInventor: Munenori MAEDA
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Patent number: 11243808Abstract: An information processing apparatus includes a memory and a processor. The memory stores a first queue being registered a newly generated task, and a second queue being registered a thread in an executable state among threads assigned to the task. The processor performs a process including: judging execution priority of a second task registered in the first queue and of a second thread registered in the second queue when execution of a first task by a first thread ends, retrieving, if it is judged that the second thread is to be executed first, the second thread from the second queue and executing a task, to which the second thread is assigned, by the second thread, and retrieving, if it is judged that the second task is to be executed first, the second task from the first queue and executing the second task by the first thread.Type: GrantFiled: March 3, 2020Date of Patent: February 8, 2022Assignee: FUJITSU LIMITEDInventor: Munenori Maeda
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Patent number: 11150968Abstract: An apparatus includes: a first memory configured to store thread information to be used in thread execution; a second memory configured to store the thread information saved from the first memory; and a processor configured to execute allocation processing. In an example, the allocation processing includes: judging based on an instruction to generate a thread whether the first memory has an empty area to store the thread information of the thread; allocating the empty area to the thread information of the thread when the first memory has the empty area; and generating identification information in response that the thread is generated, by using a first index and discrimination information, the first index being an index for identifying the thread information stored in the first memory, the discrimination information being information for discriminating the thread information stored in the first memory from the thread information saved to the second memory.Type: GrantFiled: August 29, 2019Date of Patent: October 19, 2021Assignee: FUJITSU LIMITEDInventor: Munenori Maeda
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Publication number: 20210234757Abstract: An information processing device, includes a memory; and a processor coupled to the memory and configured to: store, in the memory, a confirmation program for performing communication confirmation of a network, transmit the confirmation program to a server in the network, collect an execution result of the communication confirmation transmitted from the server by causing the server to execute the communication confirmation, and perform correctness determination of the execution result.Type: ApplicationFiled: December 3, 2020Publication date: July 29, 2021Applicant: FUJITSU LIMITEDInventors: Kazumi ABE, Munenori MAEDA
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Publication number: 20200310869Abstract: An information processing apparatus includes a memory and a processor. The memory stores a first queue being registered a newly generated task, and a second queue being registered a thread in an executable state among threads assigned to the task. The processor performs a process including: judging execution priority of a second task registered in the first queue and of a second thread registered in the second queue when execution of a first task by a first thread ends, retrieving, if it is judged that the second thread is to be executed first, the second thread from the second queue and executing a task, to which the second thread is assigned, by the second thread, and retrieving, if it is judged that the second task is to be executed first, the second task from the first queue and executing the second task by the first thread.Type: ApplicationFiled: March 3, 2020Publication date: October 1, 2020Applicant: FUJITSU LIMITEDInventor: Munenori MAEDA
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Publication number: 20200285510Abstract: A plurality of processors are communicatively coupled to each other. Each of the plurality of processors is configured to independently execute a task distribution process that includes collecting processing capacities of the plurality of processors, and distribute a predetermined number of tasks to the plurality of processors with distribution probabilities corresponding to respective ratios of the collected processing capacities.Type: ApplicationFiled: March 3, 2020Publication date: September 10, 2020Applicant: FUJITSU LIMITEDInventor: Munenori MAEDA
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Patent number: 10581748Abstract: An information processing apparatus including a communication interface to communicate with another information processing apparatus, and a processor that executes a process including issuing, by a first thread, a reception request of data from the another information processing apparatus to the communication interface, determining, by using the first thread, whether a completion notification is stored in a queue that stores data transmitted from the other information processing apparatus, causing the first thread to transit to a suspended state when the completion notification is not stored, executing a processing by using a second thread included in the plurality of threads when the first thread is in the suspended state, determining whether the completion notification is stored in the queue after the processing, and transferring the received data to the first thread and causing the first thread to return from the suspended state, upon a storing of the completion notification.Type: GrantFiled: April 17, 2018Date of Patent: March 3, 2020Assignee: FUJITSU LIMITEDInventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
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Patent number: 10580456Abstract: A driving information recording apparatus that records driving information of a vehicle, the apparatus includes: a processor that: (i) associates, as a data file, information related to a driving condition of the vehicle with a driving mode of the vehicle at a time at which the driving condition occurred, and (ii) records the data file in a recording medium having a recording area. Thus, it is possible to provide a preferred technology for recording the driving information of the vehicle that has a switching function of driving modes.Type: GrantFiled: January 25, 2018Date of Patent: March 3, 2020Assignee: DENSO TEN LimitedInventors: Munenori Maeda, Minoru Maehata
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Patent number: 10564848Abstract: An information storage device includes a memory and a processor coupled to the memory. The memory is configured to store therein a plurality of data. The processor is configured to receive a write request of writing first data to the memory. The processor is configured to perform an exclusive OR operation on the first data and second data of the plurality of data to obtain first difference data. The processor is configured to encode the first difference data by a run-length encoding to obtain encoded data. The processor is configured to determine whether a first size of the encoded data is smaller than a predetermined threshold value. The processor is configured to store, upon determining that the first size is smaller than the predetermined threshold value, the encoded data in the memory in association with first position information indicating a position of the second data.Type: GrantFiled: March 29, 2017Date of Patent: February 18, 2020Assignee: FUJITSU LIMITEDInventor: Munenori Maeda
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Publication number: 20190384658Abstract: An information processing apparatus includes: a first memory configured to store thread information to be used in thread execution; a second memory configured to store the thread information saved from the first memory; and a processor configured to (i) execute an execution processing that includes executing a thread, (ii) execute a saving processing that includes saving the thread information of a saving target thread from the first memory to the second memory after execution of the saving target thread completes, the saving target thread being any of threads to be executed by the execution processing, and (iii) execute an information transfer processing that includes transferring the thread information to be used by an execution target thread from the second memory to the execution processing, if the execution target thread uses the thread information saved to the second memory.Type: ApplicationFiled: August 29, 2019Publication date: December 19, 2019Applicant: FUJITSU LIMITEDInventor: Munenori MAEDA
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Patent number: 10399438Abstract: A data processing apparatus processes moving image data that shows a vicinity of a vehicle and that is recorded while the vehicle is running. The data processing apparatus includes a controller configured to: acquire behavioral information on a specific behavior of the vehicle during an image capturing period of the moving image data; acquire object information on an object in the vicinity of the vehicle during the image capturing period of the moving image data; and determine a cause of the specific behavior of the vehicle based on the behavioral information and the object information.Type: GrantFiled: October 19, 2015Date of Patent: September 3, 2019Assignee: FUJITSU TEN LIMITEDInventors: Haruki Shiraishi, Munenori Maeda, Kohei Ono, Toshio Tanabe, Lin Li
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Patent number: 10318362Abstract: An information processing apparatus including a memory that stores correspondence information, the correspondence information indicating a correspondence between a plurality of first identifiers and a plurality of combinations of one of a plurality of first threads and one of a plurality of second threads, respectively, and a processor coupled to the memory and the processor configured to execute a process including storing, into a queue, a completion notification corresponding to received data upon a reception of the received data, the received data including a second identifier indicating a combination of transmission source thread among the plurality of second threads and a destination thread among the plurality of first threads, retrieving the completion notification stored in the queue, specifying a third thread among the plurality of first threads based on the second identifier included in the received data and the correspondence information, and transmitting the received data to the third thread.Type: GrantFiled: April 16, 2018Date of Patent: June 11, 2019Assignee: FUJITSU LIMITEDInventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
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Patent number: 10268398Abstract: A storage system includes a storage device that stores divided data which represents data which is obtained by division of data in a time series; a server device that acquires a first time, searches interval-related information for an interval that overlaps an interval between the first time and a second time following the first time by a specified duration of time, the interval-related information storing information in which identifying information that identifies the divided data and information that relates to intervals which indicate start times and end times of the divided data are associated, and acquires identifying information for the divided data that corresponds to the interval for which the search was performed; and a terminal device that acquires from the storage device the divided data that corresponds to the acquired identifying information and reads out the acquired divided data in chronological order.Type: GrantFiled: September 3, 2015Date of Patent: April 23, 2019Assignee: FUJITSU LIMITEDInventors: Munenori Maeda, Toshihiro Ozawa
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Publication number: 20180307548Abstract: An information processing apparatus including a memory that stores correspondence information, the correspondence information indicating a correspondence between a plurality of first identifiers and a plurality of combinations of one of a plurality of first threads and one of a plurality of second threads, respectively, and a processor coupled to the memory and the processor configured to execute a process including storing, into a queue, a completion notification corresponding to received data upon a reception of the received data, the received data including a second identifier indicating a combination of transmission source thread among the plurality of second threads and a destination thread among the plurality of first threads, retrieving the completion notification stored in the queue, specifying a third thread among the plurality of first threads based on the second identifier included in the received data and the correspondence information, and transmitting the received data to the third thread.Type: ApplicationFiled: April 16, 2018Publication date: October 25, 2018Applicant: FUJITSU LIMITEDInventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
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Publication number: 20180309687Abstract: An information processing apparatus including a communication interface to communicate with another information processing apparatus, and a processor that executes a process including issuing, by a first thread, a reception request of data from the another information processing apparatus to the communication interface, determining, by using the first thread, whether a completion notification is stored in a queue that stores data transmitted from the other information processing apparatus, causing the first thread to transit to a suspended state when the completion notification is not stored, executing a processing by using a second thread included in the plurality of threads when the first thread is in the suspended state, determining whether the completion notification is stored in the queue after the processing, and transferring the received data to the first thread and causing the first thread to return from the suspended state, upon a storing of the completion notification.Type: ApplicationFiled: April 17, 2018Publication date: October 25, 2018Applicant: FUJITSU LIMITEDInventors: Yuki MATSUO, Munenori MAEDA, Kohta Nakashima