Patents by Inventor Munetoshi Fukami

Munetoshi Fukami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11748284
    Abstract: A system and method for efficiently arbitrating traffic on a bus. A computing system includes a fabric for routing traffic among one or more agents and one or more endpoints. The fabric includes multiple arbiters in an arbitration hierarchy. Arbiters store traffic in buffers with each buffer associated with a particular traffic type and a source of the traffic. Arbiters maintain a respective urgency counter for keeping track of a period of time traffic of a particular type is blocked by upstream arbiters. When the block is removed, the traffic of the particular type has priority for selection based on the urgency counter. When arbiters receive feedback from downstream arbiters or sources, the arbiters adjust selection priority accordingly. For example, changes in bandwidth requirement, low latency tolerance and active status cause adjustments in selection priority of stored requests.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: September 5, 2023
    Assignee: Apple Inc.
    Inventors: Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami, Benjamin K. Dodge, Vinodh R. Cuppu
  • Publication number: 20210342282
    Abstract: A system and method for efficiently arbitrating traffic on a bus. A computing system includes a fabric for routing traffic among one or more agents and one or more endpoints. The fabric includes multiple arbiters in an arbitration hierarchy. Arbiters store traffic in buffers with each buffer associated with a particular traffic type and a source of the traffic. Arbiters maintain a respective urgency counter for keeping track of a period of time traffic of a particular type is blocked by upstream arbiters. When the block is removed, the traffic of the particular type has priority for selection based on the urgency counter. When arbiters receive feedback from downstream arbiters or sources, the arbiters adjust selection priority accordingly. For example, changes in bandwidth requirement, low latency tolerance and active status cause adjustments in selection priority of stored requests.
    Type: Application
    Filed: July 14, 2021
    Publication date: November 4, 2021
    Inventors: Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami, Benjamin K. Dodge, Vinodh R. Cuppu
  • Patent number: 11093425
    Abstract: A system and method for efficiently arbitrating traffic on a bus. A computing system includes a fabric for routing traffic among one or more agents and one or more endpoints. The fabric includes multiple arbiters in an arbitration hierarchy. Arbiters store traffic in buffers with each buffer associated with a particular traffic type and a source of the traffic. Arbiters maintain a respective urgency counter for keeping track of a period of time traffic of a particular type is blocked by upstream arbiters. When the block is removed, the traffic of the particular type has priority for selection based on the urgency counter. When arbiters receive feedback from downstream arbiters or sources, the arbiters adjust selection priority accordingly. For example, changes in bandwidth requirement, low latency tolerance and active status cause adjustments in selection priority of stored requests.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: August 17, 2021
    Assignee: Apple Inc.
    Inventors: Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami, Benjamin K. Dodge, Vinodh R. Cuppu
  • Patent number: 10963172
    Abstract: A system and method for efficiently allocating data storage to agents. A computing system includes an interconnect with intermediate buffers for storing transactions and corresponding payload data during transport between sources and destinations. A data storage limit is set on an amount of data storage corresponding to outstanding transactions for each of the multiple sources based on the initial buffer assignments. A number of outstanding transactions for each of the multiple sources is limited based on a corresponding data storage limit. If the rate of allocation of a given buffer assigned to a first source exceeds a threshold, then a second source is selected with available space exceeding a threshold in an assigned buffer. If it is determined the second source is not assigned to a buffer with a rate of allocation exceeding a threshold, then buffer storage is reassigned from the second source to the first source.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: March 30, 2021
    Assignee: Apple Inc.
    Inventors: Nachiappan Chidambaram Nachiappan, David L. Trawick, Yiu Chun Tse, Deniz Balkan, Hengsheng Geng, Shawn Munetoshi Fukami, Jaideep Dastidar, Benjamin K. Dodge, Vinodh R. Cuppu
  • Patent number: 10965478
    Abstract: A system and method for efficiently disconnecting links in a communication fabric. A computing system includes a fabric for routing traffic among one or more agents and a memory controller for system memory. The fabric includes multiple hierarchical clusters with a split topology where the data links are physically separated from the control links. When the controller in an intermediate cluster or agent determines local resources are idle, the controller sends separate requests for link disconnect on each of the upstream control and data links. When a single acknowledgment of link disconnect is received, the controller does not proceed with any link disconnect. Rather, the controller waits until an acknowledgment of link disconnect is received for each of the upstream control and data links. If local resources remain idle, the controller sends confirmation upstream and performs a link disconnect for each of the upstream control and data links.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: March 30, 2021
    Assignee: Apple Inc.
    Inventors: Shawn Munetoshi Fukami, Hengsheng Geng
  • Patent number: 10802968
    Abstract: An apparatus for processing memory requests from a functional unit in a computing system is disclosed. The apparatus may include an interface that may be configured to receive a request from the functional. Circuitry may be configured initiate a speculative read access command to a memory in response to a determination that the received request is a request for data from the memory. The circuitry may be further configured to determine, in parallel with the speculative read access, if the speculative read will result in an ordering or coherence violation.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: October 13, 2020
    Assignee: Apple Inc.
    Inventors: Sukalpa Biswas, Harshavardhan Kaushikkar, Munetoshi Fukami, Gurjeet S. Saund, Manu Gulati, Shinye Shiu
  • Patent number: 10649922
    Abstract: A system and method for efficiently scheduling requests. In various embodiments, a processor sends commands such as read requests and write requests to an arbiter. The arbiter reduces latencies between commands being sent to a communication fabric and corresponding data being sent to the fabric. When the arbiter selects a given request, the arbiter identifies a first subset of stored requests affected by the given request being selected. The arbiter adjusts one or more attributes of the first subset of requests based on the selection of the given request. In one example, the arbiter replaces a weight attribute with a value, such as a zero value, indicating the first subset of requests should not be selected. Therefore, during the next selection by the arbiter, only the requests in a second subset different from the first subset are candidates for selection.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: May 12, 2020
    Assignee: Apple Inc.
    Inventors: Shawn Munetoshi Fukami, Jaideep Dastidar, Yiu Chun Tse
  • Publication number: 20200057737
    Abstract: A system and method for efficiently arbitrating traffic on a bus. A computing system includes a fabric for routing traffic among one or more agents and one or more endpoints. The fabric includes multiple arbiters in an arbitration hierarchy. Arbiters store traffic in buffers with each buffer associated with a particular traffic type and a source of the traffic. Arbiters maintain a respective urgency counter for keeping track of a period of time traffic of a particular type is blocked by upstream arbiters. When the block is removed, the traffic of the particular type has priority for selection based on the urgency counter. When arbiters receive feedback from downstream arbiters or sources, the arbiters adjust selection priority accordingly. For example, changes in bandwidth requirement, low latency tolerance and active status cause adjustments in selection priority of stored requests.
    Type: Application
    Filed: August 20, 2018
    Publication date: February 20, 2020
    Inventors: Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami, Benjamin K. Dodge, Vinodh R. Cuppu
  • Publication number: 20200050379
    Abstract: A system and method for efficiently allocating data storage to agents. A computing system includes an interconnect with intermediate buffers for storing transactions and corresponding payload data during transport between sources and destinations. A data storage limit is set on an amount of data storage corresponding to outstanding transactions for each of the multiple sources based on the initial buffer assignments. A number of outstanding transactions for each of the multiple sources is limited based on a corresponding data storage limit. If the rate of allocation of a given buffer assigned to a first source exceeds a threshold, then a second source is selected with available space exceeding a threshold in an assigned buffer. If it is determined the second source is not assigned to a buffer with a rate of allocation exceeding a threshold, then buffer storage is reassigned from the second source to the first source.
    Type: Application
    Filed: August 9, 2018
    Publication date: February 13, 2020
    Inventors: Nachiappan Chidambaram Nachiappan, David L. Trawick, Yiu Chun Tse, Deniz Balkan, Hengsheng Geng, Shawn Munetoshi Fukami, Jaideep Dastidar, Benjamin K. Dodge, Vinodh R. Cuppu
  • Publication number: 20200044877
    Abstract: A system and method for efficiently disconnecting links in a communication fabric. A computing system includes a fabric for routing traffic among one or more agents and a memory controller for system memory. The fabric includes multiple hierarchical clusters with a split topology where the data links are physically separated from the control links. When the controller in an intermediate cluster or agent determines local resources are idle, the controller sends separate requests for link disconnect on each of the upstream control and data links. When a single acknowledgment of link disconnect is received, the controller does not proceed with any link disconnect. Rather, the controller waits until an acknowledgment of link disconnect is received for each of the upstream control and data links. If local resources remain idle, the controller sends confirmation upstream and performs a link disconnect for each of the upstream control and data links.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 6, 2020
    Inventors: Shawn Munetoshi Fukami, Hengsheng Geng
  • Publication number: 20200042469
    Abstract: A system and method for efficiently scheduling requests. In various embodiments, a processor sends commands such as read requests and write requests to an arbiter. The arbiter reduces latencies between commands being sent to a communication fabric and corresponding data being sent to the fabric. When the arbiter selects a given request, the arbiter identifies a first subset of stored requests affected by the given request being selected. The arbiter adjusts one or more attributes of the first subset of requests based on the selection of the given request. In one example, the arbiter replaces a weight attribute with a value, such as a zero value, indicating the first subset of requests should not be selected. Therefore, during the next selection by the arbiter, only the requests in a second subset different from the first subset are candidates for selection.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 6, 2020
    Inventors: Shawn Munetoshi Fukami, Jaideep Dastidar, Yiu Chun Tse
  • Patent number: 10423558
    Abstract: A system and method for efficiently routing data in a communication fabric. A computing system includes a fabric for routing data among one or more agents and a memory controller for system memory. The fabric includes multiple hierarchical clusters with a split topology where the data links are physically separated from the control links. A given cluster receives a write command and associated write data, and stores them in respective buffers. The given cluster marks the write command as a candidate to be issued to the memory controller when it is determined the write data will arrive ahead of the write command at the memory controller after being issued. The given cluster prevents the write command from becoming a candidate to be issued when it is determined the write data may not arrive ahead of the write command at the memory controller.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: September 24, 2019
    Assignee: Apple Inc.
    Inventors: Shawn Munetoshi Fukami, Yiu Chun Tse, David L. Trawick, Hengsheng Geng, Jaideep Dastidar, Vinodh R. Cuppu, Deniz Balkan
  • Patent number: 10255218
    Abstract: A system and method for efficiently bridging two communication protocols. In various embodiments, a computing system includes an interconnect for routing traffic among agents and endpoints. The agents use a first communication protocol and the endpoints use a second communication protocol that differs from the first protocol with regard to at least the ordering that is enforced between transactions. A bridge selects transactions of a first type and a second type used in the first protocol for processing based on the first protocol ordering while using acknowledgments used by the second protocol.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: April 9, 2019
    Assignee: Apple Inc.
    Inventors: Yiu Chun Tse, Deniz Balkan, Vinodh R. Cuppu, Shawn Munetoshi Fukami, Jaideep Dastidar, Hengsheng Geng
  • Patent number: 10206175
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: February 12, 2019
    Assignee: Apple Inc.
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Publication number: 20180077649
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 15, 2018
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Patent number: 9860841
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: January 2, 2018
    Assignee: Apple Inc.
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Patent number: 9747239
    Abstract: A transaction filter for an on-chip communications network is disclosed. In one embodiment, an integrated circuit (IC) include a number of functional circuit blocks, some of which may be placed in a sleep mode (e.g., power-gated). The IC also includes a number of transaction filters that are each associated with a unique one of the functional circuit blocks. Responsive to its associated functional circuit block generating a transaction, a given transaction filter may determine whether the functional circuit block to which the transaction is destined is in a sleep mode. If it is determined that the transaction is destined for a functional circuit block that is currently in the sleep mode, the transaction filter may block the transaction from being conveyed.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: August 29, 2017
    Assignee: Apple Inc.
    Inventors: Gilbert H. Herbeck, Munetoshi Fukami, Manu Gulati
  • Patent number: 9639143
    Abstract: A method and apparatus for interfacing dynamic hardware power managed blocks and software power managed blocks is disclosed. In one embodiment, and integrated circuit (IC) may include a number of power manageable functional units. The functional units maybe power managed through hardware, software, or both. Each of the functional units may be coupled to at least one other functional unit through a direct communications link. A link state machine may monitor each of the communications links between functional units, and may broadcast indications of link availability to the functional units coupled to the link. Responsive to a software request to shut down a given link, or a hardware initiated shutdown of one of the functional units coupled to the link, the link state machine may broadcast and indication that the link is unavailable.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: May 2, 2017
    Assignee: Apple Inc.
    Inventors: Erik P. Machnicki, Gurjeet S. Saund, Munetoshi Fukami, Shane J. Keil, Chaitanya Kosaraju, Erdem Guleyupoglu, Jason M. Kassoff, Kevin C. Wong
  • Publication number: 20170055218
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Publication number: 20160328322
    Abstract: An apparatus for processing memory requests from a functional unit in a computing system is disclosed. The apparatus may include an interface that may be configured to receive a request from the functional. Circuitry may be configured initiate a speculative read access command to a memory in response to a determination that the received request is a request for data from the memory. The circuitry may be further configured to determine, in parallel with the speculative read access, if the speculative read will result in an ordering or coherence violation.
    Type: Application
    Filed: May 6, 2015
    Publication date: November 10, 2016
    Inventors: Sukalpa Biswas, Harshavardhan Kaushikkar, Munetoshi Fukami, Gurjeet S. Saund, Manu Gulati, Shinye Shiu