Patents by Inventor Muneyuki Matsumoto

Muneyuki Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10194094
    Abstract: When a time at which a first pulsed light starts arriving at pixels after being reflected by an object is a first time, a time at which the first pulsed light finishes arriving at the pixels is a second time, and a time at which a second pulsed light starts arriving at the pixels after being reflected by the object is a third time, a control circuit decreases sensitivity of the pixels in first part of a first period from the first time including the second time, to a level lower than the sensitivity of the pixels in at least part of a second period after the first period and up to the third time, and increases the sensitivity of the pixels in second part of the first period, to a level higher than the sensitivity of the pixels in the at least part of the second period.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: January 29, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masaaki Yanagida, Muneyuki Matsumoto
  • Publication number: 20170366726
    Abstract: When a time at which a first pulsed light starts arriving at pixels after being reflected by an object is a first time, a time at which the first pulsed light finishes arriving at the pixels is a second time, and a time at which a second pulsed light starts arriving at the pixels after being reflected by the object is a third time, a control circuit decreases sensitivity of the pixels in first part of a first period from the first time including the second time, to a level lower than the sensitivity of the pixels in at least part of a second period after the first period and up to the third time, and increases the sensitivity of the pixels in second part of the first period, to a level higher than the sensitivity of the pixels in the at least part of the second period.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 21, 2017
    Inventors: MASAAKI YANAGIDA, MUNEYUKI MATSUMOTO
  • Publication number: 20070161342
    Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.
    Type: Application
    Filed: February 27, 2007
    Publication date: July 12, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
  • Patent number: 7238093
    Abstract: A chemical mechanical polishing cloth for chemically mechanically polishing a workpiece. This chemical mechanical polishing cloth includes, on the opposite-to-workpiece face thereof: polishing projections having polishing faces arranged to come in contact with a workpiece for polishing the same; polishing agent passages for introducing a polishing agent; and at least one-stage step portions formed between the polishing faces of the polishing projections and the bottoms of the polishing agent passages.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: July 3, 2007
    Assignee: Rohm Co., Ltd.
    Inventors: Tatsuya Sakamoto, Muneyuki Matsumoto
  • Patent number: 7042100
    Abstract: A semiconductor device includes an insulating film. On this insulating film are formed an interconnection trench communicating with a semiconductor element and a pad trench communicating with the interconnection trench. In the pad trench, a protrusion is formed by leaving one part of the insulating film. A conductive film is formed over the insulating film including the interconnection and pad trenches. Thereafter, the conductive film is removed by a CMP process. At this time, the protrusion serves to prevent the conductive film in the pad trench from being over-polished.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: May 9, 2006
    Assignee: Rohm Co., Ltd
    Inventors: Koji Yamamoto, Nobuhisa Kumamoto, Muneyuki Matsumoto
  • Patent number: 6992006
    Abstract: The present invention provides a method for fabricating a semiconductor device which initially performs chemical mechanical polishing with respect to a metal film made of copper formed on a semiconductor substrate to form wires composed of the metal film on the semiconductor substrate and subsequently removes a wire-to-wire bridge occurring during the formation of the wires and remaining on the semiconductor substrate to cause unneeded conduction between the wires adjacent to each other. The removal of the wire-to-wire bridge is performed by oxidizing the wire-to-wire bridge into a copper oxide by using an aqueous hydrogen peroxide and then dissolving the copper oxide by using an oxalic acid. This allows the removal of the wire-to-wire bridge without damaging the main bodies of the wires.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: January 31, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Otsuka, Tsuyoshi Miyata, Muneyuki Matsumoto, Hiroshi Kawano
  • Publication number: 20050156332
    Abstract: A semiconductor device includes an insulating film. On this insulating film, formed are an interconnection trench communicating with a semiconductor element and a pad trench communicating with the interconnection trench. In the pad trench, a protrusion is formed by leaving one part of the insulating film. A conductive film is formed over the insulating film including the interconnection and pad trenches. Thereafter, the conductive film is removed by a CMP process. At this time, the protrusion serves to prevent the conductive film in the pad trench from being over-polished.
    Type: Application
    Filed: February 22, 2005
    Publication date: July 21, 2005
    Inventors: Koji Yamamoto, Nobuhisa Kumamoto, Muneyuki Matsumoto
  • Patent number: 6879049
    Abstract: A semiconductor device includes an insulating film. On this insulating film, are formed an interconnection trench communicating with a semiconductor element and a pad trench communicating with the interconnection trench. In the pad trench, a protrusion is formed by leaving one part of the insulating film. A conductive film is formed over the insulating film including the interconnection and pad trenches. Thereafter, the conductive film is removed by a CMP process. At this time, the protrusion serves to prevent the conductive film in the pad trench from being over-polished.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: April 12, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Koji Yamamoto, Nobuhisa Kumamoto, Muneyuki Matsumoto
  • Publication number: 20050048777
    Abstract: The present invention provides a method for fabricating a semiconductor device which initially performs chemical mechanical polishing with respect to a metal film made of copper formed on a semiconductor substrate to form wires composed of the metal film on the semiconductor substrate and subsequently removes a wire-to-wire bridge occurring during the formation of the wires and remaining on the semiconductor substrate to cause unneeded conduction between the wires adjacent to each other. The removal of the wire-to-wire bridge is performed by oxidizing the wire-to-wire bridge into a copper oxide by using an aqueous hydrogen peroxide and then dissolving the copper oxide by using an oxalic acid. This allows the removal of the wire-to-wire bridge without damaging the main bodies of the wires.
    Type: Application
    Filed: August 23, 2004
    Publication date: March 3, 2005
    Inventors: Hideki Otsuka, Tsuyoshi Miyata, Muneyuki Matsumoto, Hiroshi Kawano
  • Publication number: 20040266322
    Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.
    Type: Application
    Filed: April 29, 2004
    Publication date: December 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
  • Publication number: 20040248401
    Abstract: A TaN film and a Cu film are deposited successively over an insulating film formed with trenches. Then, a first CMP process is performed by using a slurry having a polishing rate for Cu sufficiently higher than a polishing rate for TaN and containing an agent for forming a protective film for Cu in a sufficient amount. As a result, the upper surface of the portion of the Cu film located in each of the trenches is positioned flush with the upper surface of TaN. Then, a second CMP process is performed under such a condition that the polishing rate for Cu is equal to or higher than the polishing rate for TaN, thereby forming Cu wires. By properly changing conditions for the second CMP process in accordance with the level of the upper surface of the Cu film, the upper surface of the Cu film is positioned flush with or lower in level than the upper surface of the insulating film after the second CMP process so that the occurrence of defective wiring is reduced.
    Type: Application
    Filed: June 3, 2004
    Publication date: December 9, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Mitsunari Satake, Muneyuki Matsumoto
  • Patent number: 6518150
    Abstract: In a wafer treating process, an impurity ion implanting, an Si+ ion implanting and an annealing are successively effected on an Si substrate. In the impurity ion implanting, an impurity ion is introduced into the Si substrate by ion implantation using a projected range. In the Si+ ion implanting, an Si+ ion is introduced into the Si substrate subjected to the impurity ion implanting by ion implantation using a projected range smaller than the above projected range. In the annealing, the Si substrate subjected to the impurity ion implanting and the Si+ ion implanting is subjected to heat treatment. As a result, the Si+ ion introduced in the Si+ ion implanting is bonded to each vacancy defect developed in the impurity ion implanting in the wafer treating process, so that the occurrence of crystal defects due to the vacancy defects is inhibited.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: February 11, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Muneyuki Matsumoto
  • Patent number: 6379228
    Abstract: A polishing machine provided with a plurality of bases operative independently of each other; a plurality of abrasive pads respectively fixed to the plurality of bases and each having an abrasive surface for polishing a workpiece; and a base driving mechanism for individually operating the plurality of bases. The operations of the respective bases are individually controlled by controlling the base driving mechanism by means of a control circuit. The control circuit controls the base driving mechanism so that the workpiece is generally uniformly polished by the abrasive surfaces of the respective abrasive pads.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: April 30, 2002
    Assignee: Rohm Co., LTD
    Inventor: Muneyuki Matsumoto
  • Patent number: 6376362
    Abstract: A method of producing a semiconductor device having a connecting thin film for connection to a bonding wire on a bonding pad formed on a surface of a surface protective film. A recess is formed in the surface of the surface protective film. Thereafter, a metal deposited layer composed of a material for the bonding pad is formed, and a metal thin film composed of a material for the connecting thin film is further formed thereon. After the metal thin film is formed, unnecessary parts of the metal deposited layer and the metal thin film are removed by chemical mechanical polishing, for example.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: April 23, 2002
    Assignee: Rohm Co., Ltd.
    Inventor: Muneyuki Matsumoto
  • Publication number: 20010003698
    Abstract: A polishing machine provided with a plurality of bases operative independently of each other; a plurality of abrasive pads respectively fixed to the plurality of bases and each having an abrasive surface for polishing a workpiece; and a base driving mechanism for individually operating the plurality of bases. The operations of the respective bases are individually controlled by controlling the base driving mechanism by means of a control circuit. The control circuit controls the base driving mechanism so that the workpiece is generally uniformly polished by the abrasive surfaces of the respective abrasive pads.
    Type: Application
    Filed: December 4, 2000
    Publication date: June 14, 2001
    Inventor: Muneyuki Matsumoto
  • Patent number: 5670551
    Abstract: A crosslinked foamed body obtained by subjecting a rubber compounded product comprising (A) a chlorinated ethylene/.alpha.-olefin copolymer rubber, (B) a triazinethiol as a vulcanization agent, (C) an alkyl ammonium halide as a vulcanization promotor, and (D) a hydrazide-type blowing agent to two step vulcanization and foaming at a vulcanization temperature of 120.degree. to 140.degree. C. for a vulcanization time of 5 to 10 minutes in a first step and at a vulcanization temperature of 125.degree. to 160.degree. C. for a vulcanization time of 5 to 20 minutes in a second step, the second step vulcanization temperature being higher than the first step by at least 5.degree. C., so that the expansion factor will be 3 to 10 times. This crosslinked foamed body can be colored brilliantly, exhibit excellent weatherability, suppleness and shape retention as well as good outer appearance. This product is well usable, for example, as wet suits.
    Type: Grant
    Filed: August 11, 1995
    Date of Patent: September 23, 1997
    Assignee: Mitsui Petrochemical Industries, Ltd.
    Inventors: Muneyuki Matsumoto, Keiji Okada, Yoshihisa Matsuo, Akemi Uchimi
  • Patent number: 5470919
    Abstract: A chlorinated ethylene/.alpha.-olefin copolymer rubber which is a chlorinated product of an ethylene/.alpha.-olefin copolymer rubber having a vinylidene bond at the terminal of the molecule, the number of said vinylidene bond being 0.05 to 1.00 per 1,000 carbon atoms, which has a chlorine content of 20 to 40% by weight, and which has a Mooney viscosity [ML.sub.1+4 (121.degree. C.)] of 10 to 190; and a composition comprising the chlorinated ethylene/.alpha.-olefin copolymer rubber, (a) a reinforcing agent, (b) a softening agent, and (c) a vulcanizing agent.
    Type: Grant
    Filed: July 26, 1994
    Date of Patent: November 28, 1995
    Assignee: Mitsui Petrochemical Industries, Ltd.
    Inventors: Tetsuo Tojo, Muneyuki Matsumoto, Yoshiharu Kikuchi
  • Patent number: 5028702
    Abstract: A dust-proof film is made from a material which contains a cellulose ester and whose transmittances of light having a wavelength of 365 nm and a wavelength of 436 are 98% or more, or the dust-proof film is formed of cellulose propionate whose weight average molecular weight using polystyrene as a reference is 60,000-400,000. The dust-proof film has a long life and excels in light resisting properties with respect to the i-line. In addition, the dust-proof film is useful as a long-life pellicle for a broad line and exhibits high light transmittance properties with respect to both the i-line and the g-line.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: July 2, 1991
    Assignee: Mitsui Petrochemical Industries, Ltd.
    Inventors: Muneyuki Matsumoto, Hiroaki Nakagawa