Patents by Inventor Muni B. Mohan

Muni B. Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8191034
    Abstract: A method and system are provided for automatically verifying terminal or bump compatibility in a stacked multi-chip architecture during integrated circuit design verification by comparing interfacing terminal layers from a first chip layout file and a second chip layout file and flagging connectivity problems or features that may give rise to problems and displaying these flagged problems or features to a user.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: May 29, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventor: Muni B. Mohan