Abstract: A rectifier is fabricated from a P-N junction having a P-type semiconductor layer and an adjacent N-type semiconductor layer. A mesa structure is formed in at least one of said layers. Impurities are deposited at the top of the mesa to form a high concentration region in the surface thereof. The impurities are diffused from the top surface of the mesa toward the P-N junction, whereby the mesa geometry causes the diffusion to take on a generally concave shape as it penetrates into the mesa. The distance between the perimeter of the high concentration region and the wafer substrate is therefore greater than the distance between the central portion of said region and the wafer substrate, providing improved breakdown voltage characteristics and a lower surface field. Breakdown voltage can be measured during device fabrication and precisely controlled by additional diffusions to drive the high concentration region to the required depth.

Abstract: The invention is a packaged diode suitable for operation at temperatures above 200.degree. C. and during temperature excursions between -65.degree. C. and at least 350.degree. C. The invention comprises a diode having respective p-n portions with a p-n junction therebetween, and formed of a semiconductor material that is stable and will exhibit satisfactory diode characteristics at such temperatures. Ohmic contacts are made to the opposite sides of the junction diode and to the respective p and n portions of the diode. An electrode adjacent each of the ohmic contacts is formed of an electrically conductive material that has a coefficient of thermal expansion similar to the coefficient of thermal expansion of the semiconductor material for providing structural support to the junction diode and electrical contact therewith. A lead contacts each of the electrodes opposite each electrode's contact with the diode.

Abstract: A rectifier is fabricated from a P-N junction having a P-type semiconductor layer and an adjacent N-type semiconductor layer. A mesa structure is formed in at least one of said layers. Impurities are deposited at the top of the mesa to form a high concentration region in the surface thereof. The impurities are diffused from the top surface of the mesa toward the P-N junction, whereby the mesa geometry causes the diffusion to take on a generally concave shape as it penetrates into the mesa. The distance between the perimeter of the high concentration region and the wafer substrate is therefore greater than the distance between the central portion of said region and the wafer substrate, providing improved breakdown voltage characteristics and a lower surface field. Breakdown voltage can be measured during device fabrication and precisely controlled by additional diffusions to drive the high concentration region to the required depth.

Abstract: A rectifier is fabricated from a P-N junction having a P-type semiconductor layer and an adjacent N-type semiconductor layer. A mesa structure is formed in at least one of said layers. Impurities are deposited at the top of the mesa to form a high concentration region in the surface thereof. The impurities are diffused from the top surface of the mesa toward the P-N junction, whereby the mesa geometry causes the diffusion to take on a generally concave shape as it penetrates into the mesa. The distance between the perimeter of the high concentration region and the wafer substrate is therefore greater than the distance between the central portion of said region and the wafer substrate, providing improved breakdown voltage characteristics and a lower surface field. Breakdown voltage can be measured during device fabrication and precisely controlled by additional diffusions to drive the high concentration region to the required depth.

Abstract: A power, V-grooved MOSFET having V-grooves extending in two orthogonal dimensions, thereby forming a semi-continuous mesh grid configuration which maximizes the periphery of the MOSFET channels for a given area of silicon, thus providing higher output current and lower "on resistance" for a given area than a conventional, interdigitated V-MOS power transistor having V-grooves running in only one dimension.