Abstract: Apparatus and methods are disclosed for processors that associate a taint-source operation with another operation dependent upon the taint-source operation, perform the taint-source operation thereby causing a side effect, and suppress the side effect of the taint-source operation until conditional state determining commitment of the taint-source operation is resolved. In some examples, the method can further include associating a speculation-source operation with the taint-source operation, storing taint data in taint-matrix memory associating the speculation-source operation, the taint-source operation, and/or the taint-dependent operation, and performing the suppressing of side effects based on the stored taint data.

Abstract: Apparatus and methods are disclosed for mitigating speculation-based attacks on processors. In one example of the disclosed technology, an apparatus includes a processor having memory situated to store profiler data for measuring at least one performance criteria for an instruction stream executed by the processor and control logic configured to, based on the measure performance criteria, select one of the plurality mitigation schemes to mitigate expectation-based attack on the apparatus. The apparatus can include a remediation unit that can prevent speculative side effects by implementing a delay scheme, a redo scheme, or an undo scheme which prevents side effect data generated by mis-speculated instructions from becoming visible to an attacker.

Abstract: Apparatus and methods are disclosed for processors that associate a taint-source operation with another operation dependent upon the taint-source operation, perform the taint-source operation thereby causing a side effect, and suppress the side effect of the taint-source operation until conditional state determining commitment of the taint-source operation is resolved. In some examples, the method can further include associating a speculation-source operation with the taint-source operation, storing taint data in taint-matrix memory associating the speculation-source operation, the taint-source operation, and/or the taint-dependent operation, and performing the suppressing of side effects based on the stored taint data.

Abstract: In a multi-threaded system, such as in a multi-processor system, different types of fences are provided to force completion of programmatically earlier instructions in a program. The types of fences can be thread-specific, and different types of fences are used based on different kinds of conditions, instructions, operations, or memory types. When a fence is executed, senior stores, request buffers, bus queues, or any combination of these stages in an execution pipeline can be drained. Fetches at a front end of the pipeline can also be killed to ensure that the bus queue can be drained.