Abstract: A semiconductor device including at least one drift region formed near a channel region on a substrate, a first buried insulating layer formed in the drift region, and a first reduced surface field region interposed between the first buried insulating layer and the drift region. Accordingly, the semiconductor device provides first reduced surface field regions arranged between drift regions and first buried insulating layers, thus having advantages of improved junction integrity, suitability for LDMOS transistors employing a high operation voltage and reduced total size.

Abstract: A MOS transistor and a method for manufacturing the transistor that may include forming a gate pattern on and/or over an active area of a semiconductor substrate defined as the active area and a field area, and silicide blocking films at each side of the gate pattern and partially over the uppermost surface of the gate pattern the silicide blocking films including first and second silicide blocking film portions formed spaced apart and extending in parallel to each other, and third and fourth silicide blocking film portions connected to the first and second silicide blocking film portions and formed spaced apart and extending in parallel to each other and perpendicular to the first and second silicide blocking film portions. With such a structural design, a high voltage transistor and middle voltage transistor having a reduced pitch size may be formed, thereby reducing the overall chip size.

Abstract: A transistor and fabricating method thereof includes sequentially forming a gate oxide layer and a poly gate over an active area of a semiconductor substrate, forming a drift region in the active area adjacent to the poly gate, and then forming a source/drain by simultaneously implanting impurity ions of various types into the drift region at a lower depth profile than that of the drift region.

Abstract: A semiconductor device including at least one drift region formed near a channel region on a substrate, a first buried insulating layer formed in the drift region, and a first reduced surface field region interposed between the first buried insulating layer and the drift region. Accordingly, the semiconductor device provides first reduced surface field regions arranged between drift regions and first buried insulating layers, thus having advantages of improved junction integrity, suitability for LDMOS transistors employing a high operation voltage and reduced total size.