Abstract: A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's response within known bounds by synchronizing an initialization training sequence to a reset deassertion. Specifically, the proposal facilitates response determinism from the DUT by synchronizing training sequences and subsequently synchronizing flit transmission to reset assertion as sampled by reference clock.

Abstract: A condition is detected to cause a component having physical layer circuitry with a transmitter and a receiver to enter a testing state. The transmitter transmits a pre-selected data pattern while comparing data received by the receiver to the pre-selected data pattern during a first phase of the testing state. The transmitter transmits data received by the receiver without comparing the data received by the receiver to the pre-selected data pattern during a second phase of the testing state.

Abstract: Methods and apparatuses for detecting an in-band reset using digital circuitry. A first counting circuit is coupled to receive a first clock signal and to generate output signals based on a number of cycles of the first clock signal. A second counting circuit is coupled to receive a second clock signal and the output signals from the first counting circuit. The second counting circuit generates output signals based on number of cycles of the second clock signal. A comparison circuit is coupled with to receive the output signals of the second counting circuit and to generate a reset signal if the output signals from the second counting circuit correspond to a pre-selected range.

Abstract: According to embodiments of the present invention, an adaptable traffic control system, method, article of manufacture, and apparatus receive a user-programmed value representing an amount of target traffic allowed through a connectivity device port and a user-programmed value representing a time interval during which to receive the allowed amount of target traffic. The two values define a percentage of target traffic allowed through the port for a particular port speed. One embodiment determines that port speed changed by a factor of N, scales the time interval by a factor of 1/N, and based on the allowed amount of target traffic and the scaled time interval, drops incoming target traffic when the received percentage of incoming target traffic is equal to (or greater than) the defined percentage of target traffic allowed through the port.

Abstract: A technique for decreasing VLAN lookup times in hardware-based packet switches by emulating the functionality of a content addressable memory (CAM) with software and random access memories (RAM). The decrease in lookup time is achieved by using content from the data packet to index directly into a table that stores forwarding information. Since the forwarding information is addressed directly by content from the packet, the need to spend time and resources sorting through the table of forwarding information with a key search is eliminated.

Abstract: Described herein is a method and apparatus for memory efficient fast VLAN lookups and inserts in hardware-based packet switches.