Patents by Inventor MURAT ONEN

MURAT ONEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11790033
    Abstract: A computer implemented method for speeding up execution of a convex optimization operation one or more quadratic complexity operations to be performed by an analog crossbar hardware switch, and identifying one or more linear complexity operations to be performed by a CPU. At least one of the quadratic complexity operations is performed by the analog crossbar hardware, and at least one of the linear complexity operations is performed by the CPU. An iteration of an approximation of a solution to the convex optimization operation is updated by the CPU.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: October 17, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vasileios Kalantzis, Shashanka Ubaru, Lior Horesh, Haim Avron, Oguzhan Murat Onen
  • Patent number: 11568217
    Abstract: Provided are embodiments for a computer-implemented method, a system, and a computer program product for updating analog crossbar arrays. The embodiments include receiving a number used in matrix multiplication to represent using pulse generation for a crossbar array, and receiving a first bit-length to represent the number, wherein the bit-length is a modifiable bit length. The embodiments also include selecting pulse positions in a pulse sequence having the first bit length to represent the number, performing a computation using the selected pulse positions in the pulse sequence, and updating the crossbar array using the computation.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: January 31, 2023
    Assignee: International Business Machines Corporation
    Inventors: Seyoung Kim, Oguzhan Murat Onen, Tayfun Gokmen, Malte Johannes Rasch
  • Patent number: 11544061
    Abstract: Methods and systems for solving a linear system include setting resistances in an array of settable electrical resistances in accordance with values of an input matrix. A series of input vectors is applied to the array as voltages to generate a series of respective output vectors. Each input vector in the series of vectors is updated based on comparison of the respective output vectors to a target vector. A solution of a linear system is determined that includes the input matrix based on the updated input vectors.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: January 3, 2023
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, RAMOT AT TEL AVIV UNIVERSITY LTD.
    Inventors: Malte Johannes Rasch, Oguzhan Murat Onen, Tayfun Gokmen, Chai Wah Wu, Mark S. Squillante, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh, Vasileios Kalantzis, Haim Avron
  • Patent number: 11520855
    Abstract: A computer-implemented method is presented for performing matrix sketching by employing an analog crossbar architecture. The method includes low rank updating a first matrix for a first period of time, copying the first matrix into a dynamic correction computing device, switching to a second matrix to low rank update the second matrix for a second period of time, as the second matrix is low rank updated, feeding the first matrix with first stochastic pulses to reset the first matrix back to a first matrix symmetry point, copying the second matrix into the dynamic correction computing device, switching back to the first matrix to low rank update the first matrix for a third period of time, and as the first matrix is low rank updated, feeding the second matrix with second stochastic pulses to reset the second matrix back to a second matrix symmetry point.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: December 6, 2022
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORTATION, RAMOT AT TEL-AVIV UNIVERSITY, LTD.
    Inventors: Lior Horesh, Oguzhan Murat Onen, Haim Avron, Tayfun Gokmen, Vasileios Kalantzis, Shashanka Ubaru
  • Publication number: 20220366005
    Abstract: Techniques are provided to implement hardware accelerated computing of eigenpairs of a matrix. For example, a system includes a processor, and a resistive processing unit coupled to the processor. The resistive processing unit includes an array of cells which include respective resistive devices, wherein at least a portion of the resistive devices are tunable to encode values of a given matrix which is storable in the array of cells. When the given matrix is stored in the array of cells, the processor is configured to determine an eigenvector of the stored matrix by executing a process which includes performing analog matrix-vector multiplication operations on the stored matrix to converge an initial vector to an estimate of the eigenvector of the stored matrix.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 17, 2022
    Inventors: Tomasz J. Nowicki, Oguzhan Murat Onen, Tayfun Gokmen, Vasileios Kalantzis, Chai Wah Wu, Mark S. Squillante, Malte Johannes Rasch, Wilfried Haensch, Lior Horesh
  • Publication number: 20220366230
    Abstract: A method is presented for computing an equilibrium distribution of Markov processes. The method includes storing weight values in an analog crossbar array of transition probability matrices, where the analog crossbar array of transition probability matrices represents a weight matrix with m rows and n columns, computing an eigenvector associated with a real eigenvalue of modulus one for each of the transition probability matrices, applying a gradient-based eigenvalue solver to converge to a dominant eigenpair, and determining a probability of changing from one state to another state in a stochastic entity based on outcomes of the gradient-based eigenvalue solver.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 17, 2022
    Inventors: Mark S. Squillante, Ogunzhan Murat Onen, Tayfun Gokmen, Vasileios Kalantzis, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh
  • Patent number: 11501148
    Abstract: A device configured to implement an artificial intelligence deep neural network includes a first matrix and a second matrix. The first matrix resistive processing unit (“RPU”) array receives a first input vector along the rows of the first matrix RPU. A second matrix RPU array receives a second input vector along the rows of the second matrix RPU. A reference matrix RPU array receives an inverse of the first input vector along the rows of the reference matrix RPU and an inverse of the second input vector along the rows of the reference matrix RPU. A plurality of analog to digital converters are coupled to respective outputs of a plurality of summing junctions that receive respective column outputs of the first matrix RPU array, the second matrix RPU array, and the reference RPU array and provides a digital value of the output of the plurality of summing junctions.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: November 15, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tayfun Gokmen, Seyoung Kim, Murat Onen
  • Patent number: 11462683
    Abstract: Described are CMOS-compatible protonic resistive devices (e.g., processing elements and/or memory elements). In embodiments, a protonic resistive memory can be formed from a proton-sensitive metal oxide channel where the concentration of protons intercalated inside the layer is controlled to modulate its conductivity. The protons can initially be supplied to the material stack by an implantation method. Irradiation techniques can be implemented to increase the concentration and conductivity of protons inside the materials. Some designs can put the active layer and reservoir in direct contact, creating an electrolyte-free device. Designs provide scalable solutions for full-scale Si-integration.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: October 4, 2022
    Assignee: Massachusetts Institute of Technology
    Inventors: Oguzhan Murat Onen, Jesus Del Alamo, Ju Li, Bilge Yildiz
  • Patent number: 11443171
    Abstract: Provided are embodiments for a computer-implemented method, a system, and a computer program product for updating an analog crossbar array. Embodiment include receiving a number used in matrix multiplication to represent using pulse generation for a crossbar array, and receiving a bit-length to represent the number. Embodiments also include selecting pulse positions in a pulse sequence having the bit length to represent the number, performing a computation using the selected pulse positions in the pulse sequence, and updating the crossbar array using the computation.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 13, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Seyoung Kim, Oguzhan Murat Onen, Tayfun Gokmen, Malte Johannes Rasch
  • Publication number: 20220209107
    Abstract: Described are CMOS-compatible protonic resistive devices (e.g., processing elements and/or memory elements). In embodiments, a protonic resistive memory can be formed from a proton-sensitive metal oxide channel where the concentration of protons intercalated inside the layer is controlled to modulate its conductivity. The protons can initially be supplied to the material stack by an implantation method. Irradiation techniques can be implemented to increase the concentration and conductivity of protons inside the materials. Some designs can put the active layer and reservoir in direct contact, creating an electrolyte-free device. Designs provide scalable solutions for full-scale Si-integration.
    Type: Application
    Filed: April 22, 2021
    Publication date: June 30, 2022
    Applicant: Massachusetts Institute of Technology
    Inventors: Oguzhan Murat ONEN, Jesus DEL ALAMO, Ju LI, Bilge YILDIZ
  • Publication number: 20220207376
    Abstract: Matrix inversion systems and methods are implemented using an analog resistive processing unit (RPU) array for hardware accelerated computing. A request is received from an application to compute an inverse matrix of a given matrix, and a matrix inversion process is performed in response to the received request. The matrix inversion process includes storing a first estimated inverse matrix of the given matrix in an array RPU cells, performing a first iterative process on the first estimated inverse matrix stored in the array of RPU cells to converge the first estimated inverse matrix to a second estimated inverse matrix of the given matrix, and reading the second estimated inverse matrix from the array of RPU cells upon completion of the first iterative process. An inverse matrix is returned to the application, wherein the returned inverse matrix is based, at least in part, on the second estimated inverse matrix.
    Type: Application
    Filed: December 28, 2020
    Publication date: June 30, 2022
    Inventors: Tayfun Gokmen, Oguzhan Murat Onen, Chai Wah Wu, Mark S. Squillante, Malte Johannes Rasch, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh, Vasileios Kalantzis, Vanessa Lopez-Marrero
  • Publication number: 20220197639
    Abstract: Methods and systems for solving a linear system include setting resistances in an array of settable electrical resistances in accordance with values of an input matrix. A series of input vectors is applied to the array as voltages to generate a series of respective output vectors. Each input vector in the series of vectors is updated based on comparison of the respective output vectors to a target vector. A solution of a linear system is determined that includes the input matrix based on the updated input vectors.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Inventors: Malte Johannes Rasch, Oguzhan Murat Onen, Tayfun Gokmen, Chai Wah Wu, Mark S. Squillante, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh, Vasileios Kalantzis, Haim Avron
  • Patent number: 11366876
    Abstract: A computer-implemented method for Eigenpair computation is provided. The method includes computing, her a hardware processor, an Eigenvector and respective Eigenvalues of the Eigenvector of a matrix by using a modified Stochastic Optimization process including performing a matrix vector product on a Resistive Processing Unit (RPU) crossbar array operatively coupled to the hardware processor and performing a scalar vector product on a digital device operatively coupled to the hardware processor and representing, for each of an Eigenpair, an initial guess for the Eigenvector and the respective Eigenvalues. The computing step includes storing the matrix in the RPU crossbar array.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: June 21, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chai Wah Wu, Oguzhan Murat Onen, Tayfun Gokmen, Malte Johannes Rasch, Mark S. Squillante, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh, Vasileios Kalantzis
  • Publication number: 20220083623
    Abstract: A computer implemented method for speeding up execution of a convex optimization operation one or more quadratic complexity operations to be performed by an analog crossbar hardware switch, and identifying one or more linear complexity operations to be performed by a CPU. At least one of the quadratic complexity operations is performed by the analog crossbar hardware, and at least one of the linear complexity operations is performed by the CPU. An iteration of an approximation of a solution to the convex optimization operation is updated by the CPU.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Inventors: Vasileios Kalantzis, Shashanka Ubaru, Lior Horesh, Haim Avron, Oguzhan Murat Onen
  • Publication number: 20220019877
    Abstract: Provided are embodiments for a computer-implemented method, a system, and a computer program product for updating analog crossbar arrays. The embodiments include receiving a number used in matrix multiplication to represent using pulse generation for a crossbar array, and receiving a first bit-length to represent the number, wherein the bit-length is a modifiable bit length. The embodiments also include selecting pulse positions in a pulse sequence having the first bit length to represent the number, performing a computation using the selected pulse positions in the pulse sequence, and updating the crossbar array using the computation.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 20, 2022
    Inventors: SEYOUNG KIM, Oguzhan Murat Onen, TAYFUN GOKMEN, MALTE JOHANNES RASCH
  • Publication number: 20220019876
    Abstract: Provided are embodiments for a computer-implemented method, a system, and a computer program product for updating an analog crossbar array. Embodiment include receiving a number used in matrix multiplication to represent using pulse generation for a crossbar array, and receiving a bit-length to represent the number. Embodiments also include selecting pulse positions in a pulse sequence having the bit length to represent the number, performing a computation using the selected pulse positions in the pulse sequence, and updating the crossbar array using the computation.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 20, 2022
    Inventors: SEYOUNG KIM, Oguzhan Murat Onen, TAYFUN GOKMEN, MALTE JOHANNES RASCH
  • Publication number: 20210406338
    Abstract: A computer-implemented method for Eigenpair computation is provided. The method includes computing an Eigenvector and respective Eigenvalues of the Eigenvector by using a Stochastic Optimization process. The computing step includes storing the matrix in a Resistive Processing Unit (RPU) crossbar array.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Inventors: Chai Wah Wu, Oguzhan Murat Onen, Tayfun Gokmen, Malte Johannes Rasch, Mark S. Squillante, Tomasz J. Nowicki, Wilfried Haensch, Lior Horesh, Vasileios Kalantzis
  • Patent number: 11200947
    Abstract: Apparatus and methods relating to programmable superconducting cells are described. A programmable superconducting cell can be formed from a superconducting current loop having at least two terminals connected to the loop. The current loop and terminals can be formed from a single layer of superconducting material. The programmable superconducting cell can be incorporated into a crossbar architecture to form a high-speed vector-matrix multiplying processor for deep neural network computations.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: December 14, 2021
    Assignee: Massachusetts Institute of Technology
    Inventors: Karl K. Berggren, Oguzhan Murat Onen, Brenden Butters, Emily Toomey
  • Publication number: 20210357540
    Abstract: A computer-implemented method is presented for performing matrix sketching by employing an analog crossbar architecture. The method includes low rank updating a first matrix for a first period of time, copying the first matrix into a dynamic correction computing device, switching to a second matrix to low rank update the second matrix for a second period of time, as the second matrix is low rank updated, feeding the first matrix with first stochastic pulses to reset the first matrix back to a first matrix symmetry point, copying the second matrix into the dynamic correction computing device, switching back to the first matrix to low rank update the first matrix for a third period of time, and as the first matrix is low rank updated, feeding the second matrix with second stochastic pulses to reset the second matrix back to a second matrix symmetry point.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 18, 2021
    Inventors: Lior Horesh, Oguzhan Murat Onen, Haim Avron, Tayfun Gokmen, Vasileios Kalantzis, Shashanka Ubaru
  • Patent number: 11133063
    Abstract: Aspects of the invention include performing a stochastic update for a crossbar array by generating a set of stochastic pulses for a crossbar array, the crossbar array including a plurality of row wires and a plurality of column wires, the plurality of row wires including a first row wire and the plurality of column wires including a first column wire, wherein a three terminal device is coupled to the first row wire and the first column wire at a crosspoint of the first row wire and the first column wire, and wherein a resistivity of the three terminal device is modified responsive to a coincidence of pulses from the set of stochastic pulses at the crosspoint of the first row and the first column, and wherein at least one terminal in the three terminal device is floating.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 28, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Seyoung Kim, Oguzhan Murat Onen, Tayfun Gokmen