Abstract: A method of and apparatus for fault detection utilizing a diagnostic procedure by a diagnostic device to detect a short circuit between at least two of a plurality of load electrical connections, the diagnostic procedure comprising applying a test electrical signal to each of the load electrical connections in turn and while applying the test electrical signal to a first one of the load electrical connections, detecting whether an electrical output is present, in response, on any other of the load electrical connections, wherein the detecting by the diagnostic device includes applying the test electrical signal to the first one of the load electrical connections in an operational mode of the apparatus when an electrically controlled switch connected to the first one of the load electrical connections is in an off state.

Abstract: A semiconductor device comprises a power transistor and a sense transistor. The power transistor conducts a power transistor current. The sense transistor conducts a sense transistor current substantially proportional to of the power transistor current. The power transistor and the sense transistor have drain source and a gate terminals, of which those of the sense transistor are arranged to be biased to those of the power transistor, respectively. The power transistor and the sense transistor each comprise: an inner region of type P?; an N-type buried layer; an N-type isolating barrier surrounding the inner region partially; an N-type source region in the inner region; an N-type drain region in the inner region. A barrier-to-drain connector connects the isolating barrier to the drain region, the one of the sense transistor has an electrical resistance which is higher than the resistance of the barrier-to-drain connector of the power transistor.

Abstract: A semiconductor device comprises a power transistor and a sense transistor. The power transistor conducts a power transistor current. The sense transistor conducts a sense transistor current substantially proportional to of the power transistor current. The power transistor and the sense transistor have drain source and a gate terminals, of which those of the sense transistor are arranged to be biased to those of the power transistor, respectively. The power transistor and the sense transistor each comprise: an inner region of type P?; an N-type buried layer; an N-type isolating barrier surrounding the inner region partially; an N-type source region in the inner region; an N-type drain region in the inner region. A barrier-to-drain connector connects the isolating barrier to the drain region, the one of the sense transistor has an electrical resistance which is higher than the resistance of the barrier-to-drain connector of the power transistor.

Abstract: A method of and apparatus for fault detection utilizing a diagnostic procedure by a diagnostic device to detect a short circuit between at least two of a plurality of load electrical connections, the diagnostic procedure comprising applying a test electrical signal to each of the load electrical connections in turn and whilst applying the test electrical signal to a first one of the load electrical connections, detecting whether an electrical output is present, in response, on any other of the load electrical connections, wherein the detecting by the diagnostic device includes applying the test electrical signal to the first one of the load electrical connections in an operational mode of the apparatus when an electrically controlled switch connected to the first one of the load electrical connections is in an off state.

Abstract: Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, while the test electrical signal is applied in turn to each load electrical connection, to detect whether a cor

Abstract: A circuit for improving the control of a change in state of a signal in an electronic device between a first state and a second state, wherein a first change in state occurs when the state changes from the second state to the first state and a second change in state occurs when the state changes from the first state to the second state and wherein the first and second changes in state have associated therewith a first and a second time delay over which each change in state occurs, characterized in that said circuit comprises a determining unit for measuring the first time delay and a calculator for calculating a common delay to replace one or more of the first and second delays to thereby improve the control of the change in state of the signal.

Abstract: Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, whilst the test electrical signal is applied in turn to each load electrical connection, to detect whether a co

Abstract: A circuit for improving the control of a change in state of a signal in an electronic device between a first state and a second state, wherein a first change in state occurs when the state changes from the second state to the first state and a second change in state occurs when the state changes from the first state to the second state and wherein the first and second changes in state have associated therewith a first and a second time delay over which the or each change in state occurs, characterized in that said circuit comprises a determining unit for measuring the first time delay and a calculator for calculating a common delay to replace one or more of the first and second delays to thereby improve the control of the change in state of the signal