Patents by Inventor Murray Jerel Niman

Murray Jerel Niman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916318
    Abstract: Disclosed is an antenna comprising a substantially elliptical element arranged substantially perpendicular to, and spaced apart from, a substantially elliptical ground plane, wherein the substantially elliptical element has a major axis which is substantially perpendicular to the ground plane, and a minor axis which is substantially parallel to the ground plane.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: February 27, 2024
    Assignee: BAE SYSTEMS PLC
    Inventors: Murray Jerel Niman, Ashley Lloyd Wade
  • Publication number: 20210376475
    Abstract: Disclosed is an antenna comprising a substantially elliptical element arranged substantially perpendicular to, and spaced apart from, a substantially elliptical ground plane, wherein the substantially elliptical element has a major axis which is substantially perpendicular to the ground plane, and a minor axis which is substantially parallel to the ground plane.
    Type: Application
    Filed: September 24, 2019
    Publication date: December 2, 2021
    Applicant: BAE SYSTEMS plc
    Inventors: Murray Jerel Niman, Ashley Lloyd Wade
  • Patent number: 10103443
    Abstract: A method of manufacturing and an antenna having an upper and lower loop. Upper loop comprising a first conductive loop defined by an upper conductor and a first conductive blade tapering outwardly to form a flare portion adjacent a distal end of the upper conductor. Lower loop comprising a second conductive loop defined by a base conductor and a second conductive blade tapering outwardly forming a flare portion adjacent a distal end of the base conductor. First and second conductive blades defining, between their facing edges, a notch opening outwardly from a feed region. Upper loop further comprising an elongate conductive vane extending at an angle from a first location on the upper conductor to a second location on the first conductive blade defining a pair of loops within the upper loop.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: October 16, 2018
    Assignee: BAE Systems plc
    Inventors: Robert Alan Lewis, Murray Jerel Niman, Dean Kitchener, Christopher Bryce Wyllie
  • Patent number: 10044106
    Abstract: A wide band antenna comprising a signal generator coupled to a feed region of at least one antenna element comprising upper and lower loops. Upper loop comprising a first conductive loop element defined by an upper conductor and a first conductive blade tapering outwardly forming a flare portion adjacent a distal end of the upper conductor. Lower loop comprising a second loop defined by a base conductor and a second conductive blade tapering outwardly forming a flare portion adjacent a distal end of the base conductor, first and second conductive blades defining, between their facing edges, a notch opening outwardly from feed region. The method comprising matching an antenna element impedance to the transmission line; selecting an antenna element cut-off frequency; selecting an upper conductor length, and subsequently selecting dimensions of the upper loop such that they are substantially equal to a wavelength corresponding to the selected cut-off frequency.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: August 7, 2018
    Assignee: BAE Systems plc
    Inventors: Robert Alan Lewis, Murray Jerel Niman, Dean Kitchener, Christopher Bryce Wyllie
  • Publication number: 20170179605
    Abstract: A wide band antenna comprising a signal generator coupled to a feed region of at least one antenna element comprising upper and lower loops. Upper loop comprising a first conductive loop element defined by an upper conductor and a first conductive blade tapering outwardly forming a flare portion adjacent a distal end of the upper conductor. Lower loop comprising a second loop defined by a base conductor and a second conductive blade tapering outwardly forming a flare portion adjacent a distal end of the base conductor, first and second conductive blades defining, between their facing edges, a notch opening outwardly from feed region. The method comprising matching an antenna element impedance to the transmission line; selecting an antenna element cut-off frequency; selecting an upper conductor length, and subsequently selecting dimensions of the upper loop such that they are substantially equal to a wavelength corresponding to the selected cut-off frequency.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 22, 2017
    Inventors: Robert Alan Lewis, Murray Jerel NIMAN, Dean Kitchener, Christopher Bryce Wyllie
  • Publication number: 20170179604
    Abstract: A method of manufacturing and an antenna having an upper and lower loop. Upper loop comprising a first conductive loop defined by an upper conductor and a first conductive blade tapering outwardly to form a flare portion adjacent a distal end of the upper conductor. Lower loop comprising a second conductive loop defined by a base conductor and a second conductive blade tapering outwardly forming a flare portion adjacent a distal end of the base conductor. First and second conductive blades defining, between their facing edges, a notch opening outwardly from a feed region. Upper loop further comprising an elongate conductive vane extending at an angle from a first location on the upper conductor to a second location on the first conductive blade defining a pair of loops within the upper loop.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 22, 2017
    Inventors: Robert Alan Lewis, Murray Jerel NIMAN, Dean Kitchener, Christopher Bryce Wyllie
  • Patent number: 9203132
    Abstract: A differential transmission transition interface is disclosed which can include first and a second buried conducting tracks providing respectively first and second differential couplings between a differential RF transmission output and a waveguide; the first buried conducting track extending over an opening of the waveguide to provide a first RF coupling element; and the second buried conducting track extending over the opening to provide a second RF coupling element. At least a portion of the first RF coupling element extends over the waveguide opening in a first angular direction; and at least a portion of the second RF coupling element extends over the waveguide opening in a second angular direction that is opposed to the first angular direction.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: December 1, 2015
    Assignee: BAE Systems plc
    Inventors: Murray Jerel Niman, Bruno Peter Pirollo
  • Publication number: 20140176253
    Abstract: A differential transmission transition interface is disclosed which can include first and a second buried conducting tracks providing respectively first and second differential couplings between a differential RF transmission output and a waveguide; the first buried conducting track extending over an opening of the waveguide to provide a first RF coupling element; and the second buried conducting track extending over the opening to provide a second RF coupling element. At least a portion of the first RF coupling element extends over the waveguide opening in a first angular direction; and at least a portion of the second RF coupling element extends over the waveguide opening in a second angular direction that is opposed to the first angular direction.
    Type: Application
    Filed: July 26, 2012
    Publication date: June 26, 2014
    Applicant: BAE SYSTEM plc
    Inventors: Murray Jerel Niman, Bruno Peter Pirollo
  • Publication number: 20120279774
    Abstract: A multilayer circuit board, comprising: a plurality of printed circuit board layers arranged stacked together; and a conductively plated via passing through at least one of the printed circuit board layers in a direction hereinafter referred to as the via direction; wherein a surface of a further one of the printed circuit board layers comprises a conducting region surrounding a non-conducting region; the non-conducting region is substantially centered around a point on the surface of the further printed circuit board layer where the via direction intersects the surface; a back-drilled hole passes through the point on the surface; and a smallest width dimension, that includes the point on the surface, of the non-conducting region (e.g. diameter) is greater than the diameter of the back-drilled hole.
    Type: Application
    Filed: November 23, 2010
    Publication date: November 8, 2012
    Applicant: BAE SYSTEMS plc
    Inventor: Murray Jerel Niman
  • Publication number: 20120234580
    Abstract: A multilayer circuit board, comprising: a plurality of printed circuit board layers arranged stacked together; and a conductively plated via; a surface of a through which the via passes comprises a conducting region surrounding a non-conducting region that is substantially centered around a point where the via intersects the surface; a smallest width dimension, e.g. diameter of the non-conducting region is greater than or equal to 4 times the diameter of the via; the via connects a conductive contact pad on one printed circuit board layer to a conductive contact pad on another printed circuit board layer, with the printed circuit board with the non-conducting region lying between the two connected layers; and the largest width dimension of the conductive contact pads on the surfaces of the printed circuit board layers connected by the via are less than the smallest width dimension of the non-conducting region.
    Type: Application
    Filed: November 23, 2010
    Publication date: September 20, 2012
    Applicant: BAE Systems PLC
    Inventor: Murray Jerel Niman
  • Patent number: 8076591
    Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: December 13, 2011
    Assignee: BAE Systems plc
    Inventors: Martin Joseph Agnew, Gary David Panaghiston, Murray Jerel Niman, Nicholas Chandler
  • Patent number: 7999638
    Abstract: A microwave circuit assembly includes a Liquid Crystalline Polymer (LCP) layer that supports at least one microwave circuit component. First and second ground plane layers form the outer surfaces of the assembly and these are spaced apart at least partially by a gas, a mixture of gases, or a vacuum, from the LCP supporting layer and the at least one microwave circuit.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: August 16, 2011
    Assignee: BAE SYSTEMS plc
    Inventors: Murray Jerel Niman, Robert Brian Greed
  • Publication number: 20100237966
    Abstract: A microwave circuit assembly includes a Liquid Crystalline Polymer (LCP) layer that supports at least one microwave circuit component. First and second ground plane layers form the outer surfaces of the assembly and these are spaced apart at least partially by a gas, a mixture of gases, or a vacuum, from the LCP supporting layer and the at least one microwave circuit.
    Type: Application
    Filed: June 13, 2008
    Publication date: September 23, 2010
    Applicant: BAE SYSTEMS PLC
    Inventors: Murray Jerel Niman, Robert Brian Greed
  • Publication number: 20090279274
    Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.
    Type: Application
    Filed: December 22, 2005
    Publication date: November 12, 2009
    Inventors: Martin Joseph Agnew, Gary David Panaghiston, Murray Jerel Niman, Nicholas Chandler