Abstract: The current document is directed to a family of integrated hardware controllers that provides for cost-effective, high-bandwidth, and scalable incorporation of SSDs into large, distributed-computer systems. Certain implementations of the integrated hardware controller include dual media-access controllers for connection to one or more local area networks, remote-direct-memory-access (“RDMA”) controllers for supporting RDMA protocols over the local area network, an NVMe controller that provides access to an SSD. In certain integrated-hardware-controller implementations, the RDMA and NVMe controllers are implemented in one of a field programmable gate array (“FPGA”) and application-specific integrated circuit (“ASIC”).

Abstract: Embodiments of the present invention provide functionality, within a storage-shelf-router integrated circuit, an I/O-controller integrated circuit, or other integrated-circuit implementations of complex electronic devices, for interconnecting all possible pairs of communications ports, a first member of each pair selected from a first set of communications ports and a second member of each pair selected from a second set of communications ports. Embodiments of the present invention employ a time-division-multiplexed global shared memory in order to provide full cross-communications between two or more sets of serial-communications ports, using modest controlling clock rates and wide data-transfer channels.

Abstract: Monitoring in switch networks is disclosed. Ports in a switch may include monitoring circuitry and a monitoring tap which allows traffic data to be diverted for monitoring prior to any significant transformation of the traffic by the regular port logic. Furthermore, the monitoring circuitry can receive signaling and convert it for subsequent analysis by a protocol analyzer. The ports and paths in the switch network can be configured to create monitor paths to enable diverted traffic data to be passed through the network to locations where a protocol analyzer can be easily attached. With wide bandwidth ports, there is no disruption to the system. Because only a copy of the data is routed to the analyzer, there is no change to the original signal path and latency is identical with or without the analyzer.

Abstract: Snooping in SAS expander networks is disclosed. Ports in a SAS expander may include snoop circuitry and a snoop tap which allows snoop data to be diverted for snooping prior to any significant transformation of the traffic by the regular port logic. Furthermore, the snoop circuitry can receive OOB signaling and convert it to K characters for transmission through the SAS network and subsequent analysis by a protocol analyzer. The ports and cascades in the expander network can be configured to create snoop paths to enable snoop data to be passed through the network to locations where a protocol analyzer can be easily attached. With SAS snoop ports, there is no disruption to the system. Because only a copy of the data is routed to the analyzer, there is no change to the original signal path and latency is identical with or without the analyzer.

Abstract: Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate with all ports. Thus, the IOC can process CPU communications to determine which port to send them to, and send them to the correct port as well as process incoming communications from the ports to determine which CPU to send them to and send these communications to the correct CPU. This may significantly increase the flexibility and efficiency of a storage network.

Abstract: In various embodiments, the present invention provides virtual disk formatting by intermediate devices including: (1) a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers; (2) an I/O controller; and (3) a storage-bridge device. Additional embodiments of the present invention enhance virtual formatting by using additional padding, in a dual-abstraction method, to efficiently align virtual-block reads with underlying device blocks. Yet additional embodiments of the present invention allow for tracking and correcting device blocks corrupted during READ-MODIFY operations that occur during virtual-block WRITE operations. Various intermediate devices may employ two or more of the virtual formatting, dual abstraction, and corrupted-device-block tracking methods.

Abstract: In one embodiment of the present invention, a two-register interface is provided by a first electronic device to allow access to memory within the electronic device by external electronic devices. The two-register interface is mapped from the memory of an accessing, second electronic device. READ and WRITE accesses are transmitted from the accessing, second electronic device to the two-register interface through a communications medium. A first register of the two-register interface directs access to a particular memory location, and the second register of the two-register interface provides a portal for both READ and WRITE access to the particular memory location.

Abstract: Described herein is an improved mechanism for bridging between SAS and SATA drives based upon existing SAS expanders in a SAS domain. In particular, a bridge capable of translating between SAS and SATA protocols is embedded in or coupled to an expander. When a SAS initiator request is received at the expander, the expander can route the request, based on a routing table, either directly to a destination SAS device or to the bridge for necessary translation before it is transmitted to a destination SATA drive. The routing table includes corresponding relationships between all SAS addresses and Phys through which those SAS and SATA devices are attached to the expander. SATA devices can be virtualized in the expander through a few assigned addresses in the routing table in a SAS discovery process.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: Disclosed herein is an improved sector remapping method that maps logical sectors into physical sectors in storage disks such as SATA (Serial ATA) drives without reducing either storage capacity or I/O performance efficiency. Under this sector remapping method, logical sectors of data can be written into the physical sectors of a storage device through control frames having padded data or information associated with the padded data, as well as data frames having real data to be stored. With the padded data to be added to the real data, the frames provide multiple physical sectors to be transmitted into the storage device in a single write operation. The sector remapping method can be implemented in a storage bridge coupled to a storage device such as SATA drives.

Abstract: One embodiment of the present invention is a virtual disk formatting system includes a mass-storage device having physical sectors that each contains a data payload of a first data length and additional information, including one or more of a sector number, error-detection, and error-correction information and a virtual disk interface to the mass-storage device, implemented in an integrated circuit, that maps access operations, received from external entities by the virtual disk interface, directed to a virtual disk having virtual sectors containing a data payload of a second data length by contiguously mapping an array of virtual-sector data payloads to a contiguous array of physical-sector data payloads without introducing padding data into physical-sector data payloads or into virtual-sector data payloads to align the initial bytes of virtual sectors and physical sectors.

Abstract: Described herein is an improved mechanism for bridging between SAS and SATA drives based upon existing SAS expanders in a SAS domain. In particular, a bridge capable of translating between SAS and SATA protocols is embedded in or coupled to an expander. When a SAS initiator request is received at the expander, the expander can route the request, based on a routing table, either directly to a destination SAS device or to the bridge for necessary translation before it is transmitted to a destination SATA drive. The routing table includes corresponding relationships between all SAS addresses and Phys through which those SAS and SATA devices are attached to the expander. SATA devices can be virtualized in the expander through a few assigned addresses in the routing table in a SAS discovery process.

Abstract: Embodiments of the present invention are directed to methods for efficient queue management, and device implementations that incorporate these methods, for systems that include two or more electronic devices that share a queue residing in the memory of one of the two or more electronic devices. In certain embodiments of the present invention, a discard field or bit is included in each queue entry. The bit or field is set to a first value, such as the Boolean value “0,” by a producing device to indicate that the entry is valid, or, in other words, that the entry can be consumed by the consuming device. After placing entries into the queue, the producing device may subsequently remove one or more entries from the queue by setting the discard field or bit to a second value, such as Boolean value “1.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: Disclosed herein is an improved sector remapping method that maps logical sectors into physical sectors in storage disks such as SATA (Serial ATA) drives without reducing either storage capacity or I/O performance efficiency. Under this sector remapping method, logical sectors of data can be written into the physical sectors of a storage device through control frames having padded data or information associated with the padded data, as well as data frames having real data to be stored. With the padded data to be added to the real data, the frames provide multiple physical sectors to be transmitted into the storage device in a single write operation. The sector remapping method can be implemented in a storage bridge coupled to a storage device such as SATA drives.

Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. In various embodiments, the present invention provides virtual disk formatting by a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers.

Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. In various embodiments, the present invention provides virtual disk formatting by a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers.

Abstract: Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate with all ports. Thus, the IOC can process CPU communications to determine which port to send them to, and send them to the correct port as well as process incoming communications from the ports to determine which CPU to send them to and send these communications to the correct CPU. This may significantly increase the flexibility and efficiency of a storage network.

Abstract: Snooping in SAS expander networks is disclosed. Ports in a SAS expander may include snoop circuitry and a snoop tap which allows snoop data to be diverted for snooping prior to any significant transformation of the traffic by the regular port logic. Furthermore, the snoop circuitry can receive OOB signaling and convert it to K characters for transmission through the SAS network and subsequent analysis by a protocol analyzer. The ports and cascades in the expander network can be configured to create snoop paths to enable snoop data to be passed through the network to locations where a protocol analyzer can be easily attached. With SAS snoop ports, there is no disruption to the system. Because only a copy of the data is routed to the analyzer, there is no change to the original signal path and latency is identical with or without the analyzer.

Abstract: In various embodiments, the present invention provides virtual disk formatting by intermediate devices including: (1) a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers; (2) an I/O controller; and (3) a storage-bridge device. Additional embodiments of the present invention enhance virtual formatting by using additional padding, in a dual-abstraction method, to efficiently align virtual-block reads with underlying device blocks. Yet additional embodiments of the present invention allow for tracking and correcting device blocks corrupted during READ-MODIFY operations that occur during virtual-block WRITE operations. Various intermediate devices may employ two or more of the virtual formatting, dual abstraction, and corrupted-device-block tracking methods.